The AS7C164 is a high performance CMOS 65,536-bit Static Random Access Memory (SRAM) device organized as 8,192 words × 8 bits. It is
designed for memory applications where fast data access, low power, and simple interfacing are desired.
Equal address access and cycle times (t
AA
, t
RC
, t
WC
) of 12/15/20 ns with output enable access times (t
OE
) of 6/7/8 ns are ideal for high
performance applications. Active high and low chip enables (CE1, CE2) permit easy memory expansion with multiple-bank memory systems.
When CE1 is High or CE2 is Low the device enters standby mode. The standard AS7C164 is guaranteed not to exceed 11.0 mW power
consumption in standby mode, and typically requires only 250 µW; it offers 2.0V data retention with maximum power of 120 µW.
A write cycle is accomplished by asserting write enable (WE) and both chip enables (CE1, CE2). Data on the input pins I/O0-I/O7 is written
on the rising edge of WE (write cycle 1) or the active-to-inactive edge of CE1 or CE2 (write cycle 2). To avoid bus contention, external devices
should drive I/O pins only after outputs have been disabled with output enable (OE) or write enable (WE).
A read cycle is accomplished by asserting output enable (OE) and both chip enables (CE1, CE2), with write enable (WE) High. The chip drives
I/O pins with the data word referenced by the input address. When either chip enable or output enable is inactive, or write enable is active,
output drivers stay in high-impedance mode.
All chip inputs and outputs are TTL-compatible, and operation is from a single 5V supply. The AS7C164 is packaged in 300 mil SOJ packages.
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Parameter
Voltage on V
CC
relative to GND
Voltage on any pin relative to GND
Power dissipation
Storage temperature (plastic)
Ambient temperature with V
CC
applied
DC current into outputs (low)
Device
AS7C164
Symbol
V
t1
V
t2
P
D
T
stg
T
bias
I
out
Min
–0.50
–0.50
–
–65
–55
–
Max
+7.0
V
CC
+ 0.50
1.0
+150
+125
20
Unit
V
V
W
o
C
o
C
mA
NOTE: Stresses greater than those listed under
Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress rating only and functional oper-
ation of the device at these or any other conditions outside those indicated in the operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect reliability.
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