CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTES:
1. Jedec Class II pulse conditions and failure criterion used. Level B exceptions are: using a max positive pulse of 6.5V on the SHDN pin, and using
a max negative pulse of -1V for all pins.
2.
JA
is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
3.
JA
is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
Tech Brief TB379.
4. For
JC
, the “case temp” location is the center of the exposed metal pad on the package underside.
Analog Specifications
SYMBOL
R
TOTAL
Over recommended operating conditions, unless otherwise stated.
TEST CONDITIONS
W option
U option
MIN
(Note 19)
TYP
(Note 5)
10
50
-20
W option
U option
±50
±80
70
0
10/10/25
Voltage at pin from GND to VCC
0.1
1
200
V
CC
+20
MAX
(Note 19)
UNIT
k
k
%
ppm/°C
(Note 18)
ppm/°C
(Note 18)
V
pF
µA
PARAMETER
R
H
to R
L
Resistance
R
H
to R
L
Resistance Tolerance
End-to-End Temperature Coefficient
R
W
V
RH
, V
RL
C
H
/C
L
/C
W
(Note 18)
I
LkgDCP
Wiper Resistance
V
RH
and V
RL
Terminal Voltages
Potentiometer Capacitance
Leakage on DCP Pins
V
CC
= 3.3V, wiper current = VCC/R
TOTAL
V
RH
and V
RL
to GND
VOLTAGE DIVIDER MODE
(0V @ R
L
; V
CC
@ R
H
; measured at R
W
, unloaded)
INL
(Note 10)
DNL
(Note 9)
ZSerror
(Note 7)
FSerror
(Note 8)
Integral Non-linearity
Differential Non-linearity
Zero-scale Error
Monotonic over all tap positions, W and U
option
Monotonic over all tap positions, W and U
option
W option
U option
Full-scale Error
W option
U option
DCP register set to 40 hex for W and U
option
-1
-0.5
0
0
-5
-2
1
0.5
-1
-1
±4
1
0.5
5
2
0
0
LSB
(Note 6)
LSB
(Note 6)
LSB
(Note 6)
LSB
(Note 6)
ppm/°C
TC
V
Ratiometric Temperature Coefficient
(Notes 11, 18)
FN6186 Rev 3.00
August 14, 2015
Page 3 of 16
ISL22316
Analog Specifications
SYMBOL
Over recommended operating conditions, unless otherwise stated.
(Continued)
TEST CONDITIONS
MIN
(Note 19)
TYP
(Note 5)
MAX
(Note 19)
UNIT
PARAMETER
RESISTOR MODE
(Measurements between R
W
and R
L
with R
H
not connected, or between R
W
and R
H
with R
L
not connected)
RINL
(Note 15)
RDNL
(Note 14)
Integral Non-linearity
DCP register set between 10 hex and 7F
hex; monotonic over all tap positions;
W and U option
W option
U option
Roffset
(Note 13)
Offset
W option
U option
-1
1
MI
(Note 12)
MI
(Note 12)
MI
(Note 12)
MI
(Note 12)
MI
(Note 12)
Differential Non-linearity
-1
-0.5
0
0
1
0.5
1
0.5
5
2
Operating Specifications
Over the recommended operating conditions, unless otherwise specified.
SYMBOL
I
CC1
I
CC2
I
SB
PARAMETER
V
CC
Supply Current (Volatile Write/Read)
TEST CONDITIONS
f
SCL
= 400kHz; SDA = Open; (for I
2
C,
active, read and write states)
MIN
(Note 19)
TYP
(Note 5)
MAX
(Note 19)
0.5
3
5
7
3
5
3
5
2
4
-1
1.5
1.5
1.5
2.0
0.2
V
CC
above Vpor, to DCP Initial Value
Register recall completed and I
2
C Interface
in standby state
3
2.6
1
UNIT
mA
mA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µs
µs
µs
V
V/ms
ms
V
CC
Supply Current (Non-volatile Write/Read) f
SCL
= 400kHz; SDA = Open; (for I
2
C,
active, read and write states)
V
CC
Current (Standby)
V
CC
= +5.5V @ +85°C, I
2
C interface in
standby state
V
CC
= +5.5V @ +125°C, I
2
C interface in
standby state
V
CC
= +3.6V @ +85°C, I
2
C interface in
standby state
V
CC
= +3.6V @ +125°C, I
2
C interface in
standby state
I
SD
V
CC
Current (Shutdown)
V
CC
= +5.5V @ +85°C, I
2
C interface in
standby state
V
CC
= +5.5V @ +125°C, I
2
C interface in
standby state
V
CC
= +3.6V @ +85°C, I
2
C interface in
standby state
V
CC
= +3.6V @ +125°C, I
2
C interface in
standby state
I
LkgDig
t
DCP
(Note 18)
t
ShdnRec
(Note 18)
Leakage Current, at Pins A0, A1, SHDN,
SDA and SCL
DCP Wiper Response Time
DCP Recall Time from Shutdown Mode
Voltage at pin from GND to V
CC,
SDA is inactive
SCL falling edge of last bit of DCP data byte
to wiper new position
From rising edge of SHDN signal to wiper
stored position and RH connection
SCL falling edge of last bit of ACR data byte
to wiper stored position and RH connection
Vpor
Power-on Recall Voltage
Minimum V
CC
at which memory recall occurs
V
CC
Ramp V
CC
Ramp Rate
t
D
Power-up Delay
FN6186 Rev 3.00
August 14, 2015
Page 4 of 16
ISL22316
Operating Specifications
Over the recommended operating conditions, unless otherwise specified.
(Continued)
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
(Note 19)
TYP
(Note 5)
MAX
(Note 19)
UNIT
EEPROM SPECIFICATION
EEPROM Endurance
EEPROM Retention
t
WC
(Note 17)
Non-volatile Write Cycle Time
Temperature T
+55°C
1,000,000
50
12
20
Cycles
Years
ms
SERIAL INTERFACE SPECIFICATIONS
V
IL
V
IH
A1, A0, SHDN, SDA, and SCL Input Buffer
LOW Voltage
A1, A0, SHDN, SDA, and SCL Input Buffer
HIGH Voltage
-0.3
0.7*V
CC
0.05*V
CC
0
10
400
Any pulse narrower than the max spec is
suppressed
50
900
1300
0.4
0.3*V
CC
V
CC
+ 0.3
V
V
V
V
pF
kHz
ns
ns
ns
Hysteresis SDA and SCL Input Buffer Hysteresis
V
OL
Cpin
(Note 18)
f
SCL
t
sp
t
AA
t
BUF
SDA Output Buffer LOW Voltage, Sinking
4mA
A1, A0, SHDN, SDA, and SCL Pin
Capacitance
SCL Frequency
Pulse Width Suppression Time at SDA and
SCL Inputs
SCL Falling Edge to SDA Output Data Valid SCL falling edge crossing 30% of V
DSP 与 ARM 处理器
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
