PD - 96133A
IRF6721SPbF
IRF6721STRPbF
l
l
l
l
l
l
l
l
l
l
RoHS Compliant and Halogen Free
Low Profile (<0.7 mm)
Dual Sided Cooling Compatible
Ultra Low Package Inductance
Optimized for High Frequency Switching
Ideal for CPU Core DC-DC Converters
Optimized for Control FET application
Low Conduction and Switching Losses
Compatible with existing Surface Mount Techniques
100% Rg tested
Typical values (unless otherwise specified)
DirectFET Power MOSFET
R
DS(on)
Q
gs2
1.3nC
V
DSS
Q
g
tot
V
GS
Q
gd
3.7nC
R
DS(on)
Q
oss
7.9nC
30V max ±20V max 5.1mΩ@ 10V 8.5mΩ@ 4.5V
Q
rr
19nC
V
gs(th)
1.9V
11nC
SQ
Applicable DirectFET Outline and Substrate Outline (see p.7,8 for details)
SQ
SX
ST
MQ
MX
MT
MP
DirectFET ISOMETRIC
Description
The IRF6721SPbF combines the latest HEXFET® Power MOSFET Silicon technology with the advanced DirectFET
TM
packaging to achieve
the lowest on-state resistance in a package that has the footprint of a MICRO-8 and only 0.7 mm profile. The DirectFET package is
compatible with existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or convection
soldering techniques, when application note AN-1035 is followed regarding the manufacturing methods and processes. The DirectFET pack-
age allows dual sided cooling to maximize thermal transfer in power systems, improving previous best thermal resistance by 80%.
The IRF6721SPbF balances both low resistance and low charge along with ultra low package inductance to reduce both conduction and
switching losses. The reduced total losses make this product ideal for high efficiency DC-DC converters that power the latest generation of
processors operating at higher frequencies. The IRF6721SPbF has been optimized for parameters that are critical in synchronous buck
operating from 12 volt bus converters including Rds(on) and gate charge to minimize losses.
Absolute Maximum Ratings
Parameter
V
DS
V
GS
I
D
@ T
A
= 25°C
I
D
@ T
A
= 70°C
I
D
@ T
C
= 25°C
I
DM
E
AS
I
AR
25
Typical RDS(on) (mΩ)
Max.
Units
V
Drain-to-Source Voltage
Gate-to-Source Voltage
Continuous Drain Current, V
GS
@ 10V
Continuous Drain Current, V
GS
@ 10V
Continuous Drain Current, V
GS
@ 10V
Pulsed Drain Current
Single Pulse Avalanche Energy
Avalanche Current
g
e
e
f
Ãg
h
VGS, Gate-to-Source Voltage (V)
30
±20
14
11
60
110
62
11
14.0
12.0
10.0
8.0
6.0
4.0
2.0
0.0
0
4
8
12
16
20
24
28
A
mJ
A
20
15
10
5
0
0
5
10
ID = 14A
ID= 11A
VDS= 24V
VDS= 15V
T J = 125°C
T J = 25°C
15
20
32
VGS, Gate -to -Source Voltage (V)
Fig 1.
Typical On-Resistance vs. Gate Voltage
Notes:
Click on this section to link to the appropriate technical paper.
Click on this section to link to the DirectFET Website.
Surface mounted on 1 in. square Cu board, steady state.
QG, Total Gate Charge (nC)
Fig 2.
Typical Total Gate Charge vs. Gate-to-Source Voltage
T
C
measured with thermocouple mounted to top (Drain) of part.
Repetitive rating; pulse width limited by max. junction temperature.
Starting T
J
= 25°C, L = 1.1mH, R
G
= 25Ω, I
AS
= 11A.
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1
04/30/09
IRF6721SPbF
Static @ T
J
= 25°C (unless otherwise specified)
Parameter
BV
DSS
∆ΒV
DSS
/∆T
J
R
DS(on)
V
GS(th)
∆V
GS(th)
/∆T
J
I
DSS
I
GSS
gfs
Q
g
Q
gs1
Q
gs2
Q
gd
Q
godr
Q
sw
Q
oss
R
G
t
d(on)
t
r
t
d(off)
t
f
C
iss
C
oss
C
rss
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Gate Threshold Voltage Coefficient
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Forward Transconductance
Total Gate Charge
Pre-Vth Gate-to-Source Charge
Post-Vth Gate-to-Source Charge
Gate-to-Drain Charge
Gate Charge Overdrive
Switch Charge (Q
gs2
+ Q
gd
)
Output Charge
Gate Resistance
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Min.
30
–––
–––
–––
1.4
–––
–––
–––
–––
–––
25
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ. Max. Units
–––
22
5.1
8.5
1.9
-6.3
–––
–––
–––
–––
–––
11
2.9
1.3
3.7
3.1
4.9
7.9
2.1
7.8
8.9
9.3
5.3
1430
370
140
–––
V
Conditions
V
GS
= 0V, I
D
= 250µA
––– mV/°C Reference to 25°C, I
D
= 1mA
7.3
mΩ V
GS
= 10V, I
D
= 14A
V
GS
= 4.5V, I
D
= 11A
10.9
2.4
V V
DS
= V
GS
, I
D
= 25µA
i
i
–––
1.0
150
100
-100
–––
17
–––
–––
–––
–––
–––
–––
3.7
–––
–––
–––
–––
–––
–––
–––
mV/°C
µA V
DS
= 24V, V
GS
= 0V
V
DS
= 24V, V
GS
= 0V, T
J
= 125°C
nA
S
V
GS
= 20V
V
GS
= -20V
V
DS
= 15V, I
D
= 11A
V
DS
= 15V
V
GS
= 4.5V
I
D
= 11A
See Fig. 15
nC
Ω
nC
V
DS
= 16V, V
GS
= 0V
V
DD
= 15V, V
GS
= 4.5V
ns
I
D
= 11A
R
G
= 1.8Ω
See Fig. 17
V
GS
= 0V
Ãi
pF
V
DS
= 15V
ƒ = 1.0MHz
Diode Characteristics
Parameter
I
S
I
SM
V
SD
t
rr
Q
rr
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Min.
–––
–––
–––
–––
–––
Typ. Max. Units
–––
–––
0.80
17
19
52
A
110
1.0
26
29
V
ns
nC
Conditions
MOSFET symbol
showing the
integral reverse
p-n junction diode.
T
J
= 25°C, I
S
= 11A, V
GS
= 0V
T
J
= 25°C, I
F
= 11A
di/dt = 230A/µs
Ãg
i
i
Notes:
Pulse width
≤
400µs; duty cycle
≤
2%.
2
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IRF6721SPbF
Absolute Maximum Ratings
P
D
@T
A
= 25°C
P
D
@T
A
= 70°C
P
D
@T
C
= 25°C
T
P
T
J
T
STG
Power Dissipation
Power Dissipation
Power Dissipation
Peak Soldering Temperature
Operating Junction and
Storage Temperature Range
e
e
f
Parameter
Max.
2.2
1.4
42
270
-40 to + 150
Units
W
°C
Thermal Resistance
R
θJA
R
θJA
R
θJA
R
θJC
R
θJ-PCB
Junction-to-Ambient
Junction-to-Ambient
Junction-to-Ambient
Junction-to-Case
Junction-to-PCB Mounted
Linear Derating Factor
100
D = 0.50
Thermal Response ( Z thJA )
el
jl
kl
fl
Parameter
Typ.
–––
12.5
20
–––
1.0
0.017
Max.
58
–––
–––
3.0
–––
Units
°C/W
eÃ
W/°C
10
1
0.20
0.10
0.05
0.02
0.01
τ
J
τ
J
τ
1
R
1
R
1
τ
2
R
2
R
2
R
3
R
3
τ
A
τ
3
τ
A
Ri (°C/W)
τi
(sec)
5.276
0.00315
30.637
22.090
0.75858
36.9
0.1
τ
1
τ
2
τ
3
Ci=
τi/Ri
Ci=
τi/Ri
0.01
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthja + Tc
0.01
0.1
1
10
100
1000
0.001
1E-006
1E-005
0.0001
0.001
t1 , Rectangular Pulse Duration (sec)
Fig 3.
Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
Notes:
Used double sided cooling , mounting pad with large heatsink.
Mounted on minimum footprint full size board with metalized
back and with small clip heatsink.
R
θ
is measured at
T
J
of approximately 90°C.
Surface mounted on 1 in. square Cu
(still air).
Mounted to a PCB
with
small clip heatsink (still air)
Mounted on minimum
footprint full size board with
metalized back and with small
clip heatsink (still air)
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3
IRF6721SPbF
1000
TOP
VGS
10V
5.0V
4.5V
4.0V
3.5V
3.0V
2.8V
2.5V
1000
TOP
VGS
10V
5.0V
4.5V
4.0V
3.5V
3.0V
2.8V
2.5V
ID, Drain-to-Source Current (A)
100
ID, Drain-to-Source Current (A)
100
BOTTOM
10
BOTTOM
10
1
2.5V
1
0.1
2.5V
≤
60µs PULSE WIDTH
Tj = 25°C
0.1
100
0.1
1
1
10
≤
60µs PULSE WIDTH
Tj = 150°C
10
100
0.01
0.1
Fig 4.
Typical Output Characteristics
1000
VDS = 15V
≤60µs
PULSE WIDTH
100
T J = 150°C
T J = 25°C
T J = -40°C
Typical RDS(on) (Normalized)
VDS, Drain-to-Source Voltage (V)
V DS, Drain-to-Source Voltage (V)
Fig 5.
Typical Output Characteristics
2.0
ID = 14A
V GS = 10V
V GS = 4.5V
1.5
ID, Drain-to-Source Current (A)
10
1.0
1
0.1
1.5
2.0
2.5
3.0
3.5
4.0
4.5
0.5
-60 -40 -20 0
20 40 60 80 100 120 140 160
T J , Junction Temperature (°C)
Fig 6.
Typical Transfer Characteristics
10000
VGS = 0V,
f = 1 MHZ
C iss = C gs + C gd, C ds SHORTED
C rss = C gd
VGS, Gate-to-Source Voltage (V)
Fig 7.
Normalized On-Resistance vs. Temperature
40
35
T J = 25°C
Vgs = 3.5V
Vgs = 4.0V
Vgs = 4.5V
Vgs = 5.0V
Vgs = 8.0V
Vgs = 10V
Typical RDS(on) ( mΩ)
C oss = C ds + C gd
30
25
20
15
10
5
0
C, Capacitance(pF)
Ciss
1000
Coss
Crss
100
1
10
VDS, Drain-to-Source Voltage (V)
100
0
20
40
60
80
100
120
Fig 8.
Typical Capacitance vs.Drain-to-Source Voltage
4
Fig 9.
Typical On-Resistance vs.
Drain Current and Gate Voltage
ID, Drain Current (A)
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IRF6721SPbF
1000
1000
OPERATION IN THIS AREA
LIMITED BY R DS(on)
100µsec
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
100
T J = 150°C
T J = 25°C
T J = -40°C
100
10
1msec
1
10msec
DC
T A = 25°C
T J = 150°C
10
1
VGS = 0V
0
0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2
VSD, Source-to-Drain Voltage (V)
0.1
Single Pulse
0.01
0.01
0.10
1.00
10.00
100.00
VDS, Drain-to-Source Voltage (V)
Fig 10.
Typical Source-Drain Diode Forward Voltage
Typical VGS(th) Gate threshold Voltage (V)
60
50
ID, Drain Current (A)
Fig11.
Maximum Safe Operating Area
3.0
2.5
40
30
20
10
0
25
50
75
100
125
150
T C , Case Temperature (°C)
2.0
ID = 25µA
ID = 100µA
ID = 150µA
ID = 250µA
ID = 1.0mA
ID = 1.0A
1.5
1.0
-75 -50 -25
0
25
50
75 100 125 150
T J , Temperature ( °C )
Fig 12.
Maximum Drain Current vs. Case Temperature
250
EAS , Single Pulse Avalanche Energy (mJ)
Fig 13.
Typical Threshold Voltage vs. Junction
Temperature
ID
TOP
0.82A
1.0A
BOTTOM 11A
200
150
100
50
0
25
50
75
100
125
150
Starting T J , Junction Temperature (°C)
Fig 14.
Maximum Avalanche Energy vs. Drain Current
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