19-5211; Rev 2; 1/11
TION KIT
EVALUA BLE
AVAILA
Gigabit Multimedia Serial Link Deserializer
with LVDS System Interface
MAX9268
General Description
The MAX9268 deserializer utilizes Maxim’s gigabit
multimedia serial link (GMSL) technology. The MAX9268
deserializer features an LVDS system interface for reduced
pin count and a smaller package, and pairs with any GMSL
serializer to form a complete digital serial link for joint
transmission of high-speed video, audio, and bidirectional
control data.
The MAX9268 allows a maximum serial payload data
rate of 2.5Gbps for a 15m shielded twisted-pair (STP)
cable. The deserializer operates up to a maximum
output clock rate of 104MHz (3-channel LVDS) or 78MHz
(4-channel LVDS). This serial link supports display
panels from QVGA (320 x 240) to WXGA (1280 x 800) and
higher with 24-bit color.
The 3-channel mode outputs an LVDS clock, three lanes
of LVDS data (21 bits), UART control signals, and one I
2
S
audio channel consisting of three signals. The 4-channel
mode outputs an LVDS clock, four lanes of LVDS data
(28 bits), UART control signals, an I
2
S audio channel,
and auxiliary control outputs. The three audio outputs
form a standard I
2
S interface, supporting sample rates
from 8kHz to 192kHz and audio word lengths of 4 to 32
bits. The embedded control channel forms a full-duplex,
differential, 100kbps to 1Mbps UART link between the
serializer and deserializer. An electronic control unit (ECU),
or microcontroller (FC), can be located on the serializer
side of the link (typical for video display), on the MAX9268
side of the link (typical for image sensing), or on both sides.
In addition, the control channel enables ECU/FC control of
peripherals on the remote side, such as backlight control,
grayscale gamma correction, camera module, and touch
screen. Base-mode communication with peripherals uses
either I
2
C or the GMSL UART format. In addition, the
MAX9268 features a bypass mode that enables full-duplex
communication using custom UART formats.
The GMSL serializer driver preemphasis, along with the
MAX9268 channel equalizer, extends the link length and
enhances the link reliability. Spread spectrum is available
to reduce EMI on the LVDS and control outputs of the
MAX9268. The serial line inputs comply with ISO 10605 and
IEC 61000-4-2 ESD protection standards.
The core supply for the MAX9268 is 3.3V. The I/O supply
ranges from 1.8V to 3.3V. The MAX9268 is available in
a 48-pin TQFP package (7mm x 7mm) with an exposed
pad, and is specified over the -40NC to +105NC automotive
temperature range.
S
Pairs with Any GMSL Serializer
S
2.5Gbps Payload-Rate AC-Coupled Serial Link
S
Scrambled 8b/10b Line Coding
S
Supports WXGA (1280 x 800) with 24-Bit Color
S
8.33MHz to 104MHz (3-Channel LVDS) or 6.25MHz
Features
to 78MHz (4-Channel LVDS) Output Clock
S
4-Bit to 32-Bit Word Length, 8kHz to 192kHz I
2
S
Audio Channel Supports High-Definition Audio
S
Embedded Half-/Full-Duplex Bidirectional Control
Channel (100kbps to 1Mbps)
S
Two 3-Level Inputs Support 9 Device Addresses
S
Interrupt Supports Touch-Screen Functions for
Display Panels
S
I
2
C Master for Peripherals
S
Equalizer for Serial Link Input
S
Programmable Spread Spectrum on the LVDS and
Control Outputs for Reduced EMI
S
Serial-Data Clock Recovery Eliminates an External
Clock
S
Automatic Data-Rate Detection Allows On-the-Fly
Data-Rate Change
S
Built-In PRBS Generator for BER Testing of the
Serial Link
S
ISO 10605 and IEC 61000-4-2 ESD Protection
S
-40NC to +105NC Operating Temperature Range
S
1.8V to 3.3V I/O and 3.3V Core Supplies
S
Patent Pending
Ordering Information
PART
MAX9268GCM/V+
MAX9268GCM/V+T
TEMP RANGE
-40NC to +105NC
-40NC to +105NC
PIN-PACKAGE
48 TQFP-EP*
48 TQFP-EP*
/V denotes an automotive qualified product.
+Denotes
a lead(Pb)-free/RoHS-compliant package.
*EP
= Exposed pad.
T = Tape and reel.
Applications
High-Resolution Automotive Navigation
Rear-Seat Infotainment
Megapixel Camera Systems
_______________________________________________________________
Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
Gigabit Multimedia Serial Link Deserializer
with LVDS System Interface
MAX9268
ABSOLUTE MAXIMUM RATINGS
AVDD to AGND ....................................................-0.5V to +3.9V
DVDD, IOVDD to AGND .......................................-0.5V to +3.9V
GND to AGND ......................................................-0.5V to +0.5V
IN+, IN- to AGND .................................................-0.5V to +1.9V
TXOUT__, TXCLKOUT_ to AGND ........................-0.5V to +3.9V
All Other Pins to GND ......................... -0.5V to (V
IOVDD
+ 0.5V)
TXOUT__, TXCLKOUT_ Short Circuit to Ground
or Supply ...............................................................Continuous
Continuous Power Dissipation (T
A
= +70°C)
48-Pin TQFP (derate 36.2mW/°C above +70°C)....2898.6mW
Human Body Model (R
D
= 1.5kΩ, C
S
= 100pF)
(IN+, IN-) to AGND ..........................................................±8kV
(TXOUT__, TXCLKOUT_) to AGND .................................±8kV
All Other Pins to GND...................................................±3.5kV
IEC 61000-4-2 (R
D
= 330Ω, C
S
= 150pF)
Contact Discharge
(IN+, IN-) to AGND ..................................................±10kV
(TXOUT__, TXCLKOUT_) to AGND............................±8kV
Air Discharge
(IN+, IN-) to AGND ........................................................±12kV
(TXOUT__, TXCLKOUT_) to AGND ...............................±20kV
ISO 10605 (R
D
= 2kΩ, C
S
= 330pF)
Contact Discharge
(IN+, IN-) to AGND ..........................................................±8kV
(TXOUT__, TXCLKOUT_) to AGND .................................±8kV
Air Discharge
(IN+, IN-) to AGND ........................................................±15kV
(TXOUT__, TXCLKOUT_) to AGND ...............................±30kV
Operating Temperature Range ........................ -40°C to +105°C
Junction Temperature .....................................................+150°C
Storage Temperature Range............................ -65°C to +150°C
Lead Temperature (soldering, 10s) ................................+300°C
Soldering Temperature (reflow) ......................................+260°C
PACKAGE THERMAL CHARACTERISTICS (Note 1)
48 TQFP
Junction-to-Ambient Thermal Resistance (B
JA
) .......27.6°C/W
Junction-to-Case Thermal Resistance (B
JC
).................2°C/W
Note 1:
Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-
layer board. For detailed information on package thermal considerations, refer to
www.maxim-ic.com/thermal-tutorial.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
(V
AVDD
= V
DVDD
= 3.0V to 3.6V, V
IOVDD
= 1.7V to 3.6V, R
L
= 100Ω
Q1%
(differential), T
A
= -40NC to +105NC, unless otherwise noted.
Typical values are at V
AVDD
= V
DVDD
= V
IOVDD
= 3.3V, T
A
= +25NC.)
PARAMETER
SYMBOL
CONDITIONS
MIN
0.65 x
V
IOVDD
0.35 x
V
IOVDD
V
IN
= 0V to V
IOVDD
I
CL
= -18mA
-10
+10
-1.5
V
IOVDD
- 0.3
V
IOVDD
- 0.2
0.3
0.2
15
3
20
5
25
7
35
10
39
13
63
21
mA
TYP
MAX
UNITS
SINGLE-ENDED INPUTS (BWS, INT, CDS, EQS, MS,
PWDN,
SSEN, DRS)
High-Level Input Voltage
Low-Level Input Voltage
Input Current
Input Clamp Voltage
V
IH1
V
IL1
I
IN1
V
CL
V
V
FA
V
SINGLE-ENDED OUTPUTS (WS, SCK, SD/CNTL0, CNTL1, CNTL2/MCLK)
DCS = 0
High-Level Output Voltage
V
OH1
I
OUT
= -2mA
DCS = 1
Low-Level Output Voltage
V
OL1
I
OUT
= 2mA
V
OUT
= V
GND
,
DCS = 0
V
OUT
= V
GND
,
DCS = 1
DCS = 0
DCS = 1
V
IOVDD
= 3.0V to 3.6V
V
IOVDD
= 1.7V to 1.9V
V
IOVDD
= 3.0V to 3.6V
V
IOVDD
= 1.7V to 1.9V
V
V
Output Short-Circuit Current
I
OS
2
______________________________________________________________________________________
Gigabit Multimedia Serial Link Deserializer
with LVDS System Interface
DC ELECTRICAL CHARACTERISTICS (continued)
(V
AVDD
= V
DVDD
= 3.0V to 3.6V, V
IOVDD
= 1.7V to 3.6V, R
L
= 100Ω
Q1%
(differential), T
A
= -40NC to +105NC, unless otherwise noted.
Typical values are at V
AVDD
= V
DVDD
= V
IOVDD
= 3.3V, T
A
= +25NC.)
PARAMETER
SYMBOL
CONDITIONS
MIN
0.7 x
V
IOVDD
0.3 x
V
IOVDD
V
IN
= 0V to
V
IOVDD
(Note 2)
I
OUT
= 3mA
RX/SDA, TX/SCL
LOCK,
ERR,
GPIO_
V
IOVDD
= 1.7V to 1.9V
V
IOVDD
= 3.0V to 3.6V
-110
-80
+1
+1
0.4
0.3
TYP
MAX
UNITS
I
2
C AND UART I/O, OPEN-DRAIN OUTPUTS (RX/SDA, TX/SCL, LOCK,
ERR,
GPIO_)
High-Level Input Voltage
Low-Level Input Voltage
Input Current
Low-Level Output Voltage
V
IH2
V
IL2
I
IN2
V
OL2
V
V
FA
V
MAX9268
DIFFERENTIAL OUTPUT FOR REVERSE CONTROL CHANNEL (IN+, IN-)
Differential High Output Peak
Voltage, (V
IN+
) - (V
IN-
)
Differential Low Output Peak
Voltage, (V
IN+
) - (V
IN-
)
DIFFERENTIAL INPUTS (IN+, IN-)
Differential High Input Threshold
(Peak) Voltage, (V
IN+
) - (V
IN-
)
Differential Low Input Threshold
(Peak) Voltage, (V
IN+
) - (V
IN-
)
Input Common-Mode Voltage
((V
IN+
) + (V
IN-
))/2
Differential Input Resistance
(Internal)
V
IDH(P)
V
IDL(P)
V
CMR
R
I
Figure 2
Figure 2
-90
1
80
40
-40
1.3
100
1.6
130
90
mV
mV
V
I
V
ROH
V
ROL
No high-speed data transmission
(Figure 1)
No high-speed data transmission
(Figure 1)
30
-60
60
-30
mV
mV
THREE-LEVEL LOGIC INPUTS (ADD0, ADD1)
High-Level Input Voltage
Low-Level Input Voltage
V
IH
V
IL
ADD0 and ADD1 open or connected
to a driver with output in high impedance
(Note 3)
ADD0 and ADD1 = high or low,
PWDN
= high or low
I
CL
= -18mA
Figure 3
Figure 3
Figure 3
Figure 3
1.125
250
0.7 x
V
IOVDD
0.3 x
V
IOVDD
-10
+10
V
V
Mid-Level Input Current
I
INM
FA
Input Current
Input Clamp Voltage
Differential Output Voltage
Change in V
OD
Between
Complementary Output States
Output Offset Voltage
Change in V
OS
Between
Complementary Output States
I
IN
V
CL
V
OD
DV
OD
V
OS
DV
OS
-150
+150
-1.5
450
25
1.375
25
FA
V
mV
mV
V
mV
LVDS OUTPUTS (TXOUT__, TXCLKOUT_)
_______________________________________________________________________________________
3
Gigabit Multimedia Serial Link Deserializer
with LVDS System Interface
MAX9268
DC ELECTRICAL CHARACTERISTICS (continued)
(V
AVDD
= V
DVDD
= 3.0V to 3.6V, V
IOVDD
= 1.7V to 3.6V, R
L
= 100Ω
Q1%
(differential), T
A
= -40NC to +105NC, unless otherwise noted.
Typical values are at V
AVDD
= V
DVDD
= V
IOVDD
= 3.3V, T
A
= +25NC.)
PARAMETER
Output Short-Circuit Current
Magnitude of Differential Output
Short-Circuit Current
Output High-Impedance Current
POWER SUPPLY
Worst-Case Supply Current
(Figure 4)
Sleep-Mode Supply Current
Power-Down Current
BWS = low, f
TXCLKOUT_
= 16.6MHz
BWS = low, f
TXCLKOUT_
= 33.3MHz
BWS = low, f
TXCLKOUT_
= 66.6MHz
BWS = low, f
TXCLKOUT_
= 104MHz
PWDN
= GND
142
153
179
212
80
19
180
200
240
280
130
70
FA
FA
mA
SYMBOL
I
OS
I
OSD
I
OZ
CONDITIONS
V
OUT
= 0V or 3.6V
3.5mA LVDS output
7mA LVDS output
ADD0 and ADD1 = high or low,
PWDN
= high or low
-0.5
3.5mA LVDS output
7mA LVDS output
MIN
-7.5
-15
TYP
MAX
+7.5
+15
7.5
15
+0.5
UNITS
mA
mA
FA
I
WCS
I
CCS
I
CCZ
AC ELECTRICAL CHARACTERISTICS
(V
AVDD
= V
DVDD
= 3.0V to 3.6V, V
IOVDD
= 1.7V to 3.6V, R
L
= 100Ω
Q1%
(differential), T
A
= -40NC to +105NC, unless otherwise noted.
Typical values are at V
AVDD
= V
DVDD
= V
IOVDD
= 3.3V, T
A
= +25NC.)
PARAMETER
SYMBOL
CONDITIONS
BWS = GND, V
DRS
= V
IOVDD
Clock Frequency
f
TXCLKOUT_
BWS = GND, DRS = GND
V
BWS
= V
IOVDD
, V
DRS
= V
IOVDD
V
BWS
= V
IOVDD
, DRS = GND
I
2
C/UART PORT TIMING
Output Rise Time
Output Fall Time
Input Setup Time
Input Hold Time
SWITCHING CHARACTERISTICS
20% to 80%, C
L
= 10pF, DCS = 1
(Figure 6)
20% to 80%, C
L
= 5pF, DCS = 0
(Figure 6)
V
IOVDD
= 1.7V to 1.9V
V
IOVDD
= 3.0V to 3.6V
V
IOVDD
= 1.7V to 1.9V
V
IOVDD
= 3.0V to 3.6V
0.5
0.3
0.6
0.4
200
200
3.1
2.2
3.8
2.4
350
350
ps
ps
ns
t
R
t
F
t
SET
t
HOLD
30% to 70%, C
L
= 10pF to 100pF,
1kI pullup to IOVDD (Figure 5)
70% to 30%, C
L
= 10pF to 100pF,
1kI pullup to IOVDD (Figure 5)
I
2
C only (Figure 5)
I
2
C only (Figure 5)
20
20
100
0
150
150
ns
ns
ns
ns
MIN
8.33
16.66
6.25
12.5
TYP
MAX
16.66
104
12.5
78
MHz
UNITS
LVDS CLOCK OUTPUTS (TXCLKOUT+, TXCLKOUT-)
CNTL_ Output Rise-and-Fall Time
t
R
, t
F
LVDS Output Rise Time
LVDS Output Fall Time
t
R
t
F
20% to 80%, R
L
= 100I (Figure 3)
80% to 20%, R
L
= 100I (Figure 3)
4
______________________________________________________________________________________
Gigabit Multimedia Serial Link Deserializer
with LVDS System Interface
AC ELECTRICAL CHARACTERISTICS (continued)
(V
AVDD
= V
DVDD
= 3.0V to 3.6V, V
IOVDD
= 1.7V to 3.6V, R
L
= 100Ω
Q1%
(differential), T
A
= -40NC to +105NC, unless otherwise noted.
Typical values are at V
AVDD
= V
DVDD
= V
IOVDD
= 3.3V, T
A
= +25NC.)
PARAMETER
SYMBOL
CONDITIONS
f
TXCLKOUT_
= 12.5MHz
N = 0 to 6, t
CLK
=
f
TXCLKOUT_
= 33MHz
1/f
TXCLKOUT_
,
f
TXCLKOUT_
=
104MHz
f
TXCLKOUT_
= 78MHz
(Figure 7)
f
TXCLKOUT_
= 104MHz
LVDS Output Enable Time
LVDS Output Disable Time
Deserializer Delay
Reverse Control-Channel Output
Rise Time
Reverse Control-Channel Output
Fall Time
Lock Time
Power-Up Time
I
2
S OUTPUT TIMING
t
LVEN
t
LVDS
t
SD
t
R
t
F
t
LOCK
t
PU
From the last bit of the enable UART
packet to V
OS
= 1125mV
From the last bit of the enable UART
packet to V
OS
= 0V
Figure 8 (Note 4)
No forward-channel data transmission
(Figure 1)
No forward-channel data transmission
(Figure 1)
Figure 9
Figure 10
f
WS
= 48kHz or 44.1kHz
f
WS
= 96kHz
f
WS
= 192kHz
n
WS
= 16 bits, f
WS
=
48kHz or 44.1kHz
0.4e
-3
x t
WS
0.8e
-3
x t
WS
1.6e
-3
x t
WS
13e
-3
x t
SCK
39e
-3
x t
SCK
0.1
x t
SCK
3 x t
WS
0.3
0.4
0.35 x
t
SCK
0.35 x
t
SCK
0.5 x
t
SCK
0.5 x
t
SCK
180
180
MIN
TYP
MAX
UNITS
N/7 x t
CLK
N/7 x N/7 x t
CLK
- 250
t
CLK
+ 250
N/7 x t
CLK
N/7 x N/7 x t
CLK
- 200
t
CLK
+ 200
N/7 x t
CLK
N/7 x N/7 x t
CLK
- 125
t
CLK
+ 125
N/7 x t
CLK
N/7 x N/7 x t
CLK
- 100
t
CLK
+ 100
100
100
3540
400
400
3.6
4.1
0.5e
-3
x t
WS
1e
-3
x t
WS
2e
-3
x t
WS
16e
-3
x t
SCK
48e
-3
x t
SCK
0.13
x t
SCK
4 x t
WS
3.1
3.8
ns
ns
Fs
Fs
Bits
ns
ns
ms
ms
MAX9268
LVDS Output Pulse Position
t
PPOSN
ps
WS Jitter
t
AJ-WS
t
WS
= 1/f
WS
,
rising (falling)
edge to falling
(rising) edge
(Note 5)
SCK Jitter
t
AJ-SCK
t
SCK
= 1/f
SCK
,
rising edge to
rising edge
Audio Skew Relative to Video
SCK, SD, WS Rise-and-Fall Time
SD, WS Valid Time Before SCK
SD, WS Valid Time After SCK
t
ASK
t
R,
t
F
t
DVB
t
DVA
n
WS
= 24 bits, f
WS
=
96kHz
n
WS
= 32 bits,
f
WS
= 192kHz
Video and audio synchronized
20% to 80%
C
L
= 10pF, DCS = 1
C
L
= 5pF, DCS = 0
Fs
ns
ns
ns
t
SCK
= 1/f
SCK
(Figure 11)
t
SCK
= 1/f
SCK
(Figure 11)
Note 2:
Minimum I
IN
due to voltage drop across the internal pullup resistor.
Note 3:
Measured in serial link bit times. Bit time = 1/(30 x f
TXCLKOUT_
) for BWS = GND. Bit time = 1/(40 x f
TXCLKOUT_
) for V
BWS
=
V
IOVDD
.
Note 4:
Rising to rising-edge jitter can be twice as large.
_______________________________________________________________________________________
5
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