Datasheet> 器件分类 > 半导体> 嵌入式处理器和控制器> SST89E58RD2-40-I-NJE

SST89E58RD2-40-I-NJE: 产品描述8-bit Microcontrollers - MCU 4.5-5.5V FL Flex 8B 8051 Microcontroller; 产品类别半导体嵌入式处理器和控制器; 文件大小799KB，共92页; 制造商Microchip(微芯科技); 官网地址https://www.microchip.com; 标准

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SST89E58RD2-40-I-NJE概述

8-bit Microcontrollers - MCU 4.5-5.5V FL Flex 8B 8051 Microcontroller

SST89E58RD2-40-I-NJE规格参数

参数名称	属性值
Product Attribute	Attribute Value
制造商 Manufacturer	Microchip(微芯科技)
产品种类 Product Category	8-bit Microcontrollers - MCU
RoHS	Details
安装风格 Mounting Style	SMD/SMT
封装 / 箱体 Package / Case	PLCC-44
Core	8051
Data Bus Width	8 bit
Maximum Clock Frequency	40 MHz
Program Memory Size	32 kB
Data RAM Size	1 kB
ADC Resolution	No ADC
Number of I/Os	5 I/O
工作电源电压 Operating Supply Voltage	4.5 V to 5.5 V
最小工作温度 Minimum Operating Temperature	- 40 C
最大工作温度 Maximum Operating Temperature	+ 85 C
接口类型 Interface Type	SPI
系列 Packaging	Tube
高度 Height	4.01 mm (Max)
长度 Length	16.66 mm (Max)
Program Memory Type	EEPROM
宽度 Width	16.66 mm (Max)
Data RAM Type	RAM
Moisture Sensitive	Yes
Number of Timers/Counters	3 Timer
Processor Series	FlashFlex
工厂包装数量 Factory Pack Quantity	26
电源电压-最大 Supply Voltage - Max	3.6 V
电源电压-最小 Supply Voltage - Min	2.7 V
单位重量 Unit Weight	0.084185 oz

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Not recommended for new designs. Contact Microchip

Sales for microcontroller design options.

FlashFlex MCU

A Microchip Technology Company

SST89E54RD2A/RDA / SST89E58RD2A/RDA

Not Recommended for New Designs

The SST89E54RD2A/RDA and SST89E58RD2A/RDA are members of the Flash-

Flex family of 8-bit microcontroller products designed and manufactured with SST

patented and proprietary SuperFlash CMOS semiconductor process technology.

The split-gate cell design and thick-oxide tunneling injector offer significant cost

and reliability benefits for SST customers. The devices use the 8051 instruction

set and are pin-for-pin compatible with standard 8051 microcontroller devices.

Features

• 8-bit 8051-Compatible Microcontroller (MCU) with

Embedded SuperFlash Memory

– Fully Software Compatible

– Development Toolset Compatible

– Pin-For-Pin Package Compatible

• Programmable Counter Array (PCA)

• Four 8-bit I/O Ports (32 I/O Pins) and

One 4-bit Port

• Second DPTR register

• Low EMI Mode (Inhibit ALE)

• SPI Serial Interface

• Standard 12 Clocks per cycle, the device has an

option to double the speed to 6 clocks per cycle.

• TTL- and CMOS-Compatible Logic Levels

• Brown-out Detection

• Low Power Modes

– Power-down Mode with External Interrupt Wake-up

– Idle Mode

• SST89E5xRD2A Operation

– 0 to 40 MHz at 5V

• 1 KByte Internal RAM

• Dual Block SuperFlash EEPROM

– 16/32 KByte primary block +

8 KByte secondary block

(128-Byte sector size for both blocks)

– Individual Block Security Lock with SoftLock

– Concurrent Operation during

In-Application Programming (IAP)

– Memory Overlay for Interrupt Support during IAP

• Support External Address Range up to 64 KByte

of Program and Data Memory

• Three High-Current Drive Ports (16 mA each)

• Three 16-bit Timers/Counters

• Full-Duplex, Enhanced UART

– Framing Error Detection

– Automatic Address Recognition

• Temperature Ranges:

– Commercial (0°C to +70°C)

• Packages Available

– 44-lead PLCC

– 40-pin PDIP (Port 4 feature not available)

– 44-lead TQFP

• Ten Interrupt Sources at 4 Priority Levels

– Four External Interrupt Inputs

• All non-Pb (lead-free) devices are RoHS compliant

• Programmable Watchdog Timer (WDT)

www.microchip.com

DS25114A

12/11

FlashFlex MCU

A Microchip Technology Company

SST89E54RD2A/RDA / SST89E58RD2A/RDA

Not Recommended for New Designs

Product Description

The SST89E54RD2A/RDA and SST89E58RD2A/RDA are members of the FlashFlex family of 8-bit

microcontroller products designed and manufactured with SST patented and proprietary SuperFlash

CMOS semiconductor process technology. The split-gate cell design and thick-oxide tunneling injector

offer significant cost and reliability benefits for SST customers. The devices use the 8051 instruction

set and are pin-for-pin compatible with standard 8051 microcontroller devices.

The devices come with 24/40 KByte of on-chip flash EEPROM program memory which is partitioned

into 2 independent program memory blocks. The primary Block 0 occupies 16/32 KByte of internal pro-

gram memory space and the secondary Block 1 occupies 8 KByte of internal program memory space.

The 8-KByte secondary block can be mapped to the lowest location of the 16/32 KByte address space;

it can also be hidden from the program counter and used as an independent EEPROM-like data mem-

ory.

In addition to the 24/40 KByte of EEPROM program memory on-chip and 1024 x8 bits of on-chip RAM,

the devices can address up to 64 KByte of external program memory and up to 64 KByte of external

RAM.

The flash memory blocks can be programmed via a standard 87C5x OTP EPROM programmer fitted

with a special adapter and the firmware for SST devices. During power-on reset, the devices can be

configured as either a slave to an external host for source code storage or a master to an external host

for an in-application programming (IAP) operation. The devices are designed to be programmed in-

system and in-application on the printed circuit board for maximum flexibility. The devices are pre-pro-

grammed with an example of the bootstrap loader in the memory, demonstrating the initial user pro-

gram code loading or subsequent user code updating via the IAP operation. The sample bootstrap

loader is available for the user’s reference and convenience only; SST does not guarantee its function-

ality or usefulness. Chip-Erase or Block-Erase operations will erase the pre-programmed sample code.