MAX17000A
Complete DDR2 and DDR3 Memory
Power-Management Solution
General Description
The MAX17000A pulse-width modulation (PWM) con-
troller provides a complete power solution for notebook
DDR, DDR2, and DDR3 memory. It comprises a step-
down controller, a source-sink LDO regulator, and a ref-
erence buffer to generate the required VDDQ, VTT, and
VTTR rails.
The VDDQ rail is supplied by a step-down converter
using Maxim’s proprietary Quick-PWM™ controller. The
high-efficiency, constant-on-time PWM controller han-
dles wide input/output voltage ratios (low duty-cycle
applications) with ease and provides 100ns response
to load transients while maintaining a relatively constant
switching frequency. The Quick-PWM architecture cir-
cumvents the poor load-transient timing problems of
fixed-frequency current-mode PWMs while also avoid-
ing the problems caused by widely varying switching
frequencies in conventional constant-on-time and con-
stant-off-time PWM schemes. The controller senses the
current to achieve an accurate valley current-limit pro-
tection. It is also built in with overvoltage, undervoltage,
and thermal protections. The MAX17000A can be set to
run in three different modes: power-efficient SKIP
mode, low-noise forced-PWM mode, and standby
mode to support memory in notebook computer stand-
by operation. The switching frequency is programma-
ble from 200kHz to 600kHz to allow small components
and high efficiency. The VDDQ output voltage can be
set to a preset 1.8V or 1.5V, or be adjusted from 1.0V to
2.5V by an external resistor-divider. This output has 1%
accuracy over line-and-load operating range.
The MAX17000A includes a ±2A source-sink LDO reg-
ulator for the memory termination VTT rail. This VTT reg-
ulator has a ±5mV deadband that either sources or
sinks, ideal for the fast-changing load burst present in
memory termination applications. This feature also
reduces output capacitance requirements.
The VTTR reference buffer sources and sinks ±3mA,
providing the reference voltage needed by the memory
controller and devices on the memory bus.
The MAX17000A is available in a 24-pin, 4mm x 4mm,
thin QFN package.
Features
o
SMPS Regulator (VDDQ)
Quick-PWM with 100ns Load-Step Response
Output Voltages—Preset 1.8V, 1.5V, or
Adjustable 1.0V to 2.5V
1% V
OUT
Accuracy Over Line and Load
26V Maximum Input Voltage Rating
Accurate Valley Current-Limit Protection
200kHz to 600kHz Switching Frequency
o
Source/Sink Linear Regulator (VTT)
±2A Peak Source/Sink
Low-Output Capacitance Requirement
Output Voltages-Preset VDDQ/2 or REFIN
Adjustable from 0.5V to 1.5V
o
Soft-Start/Soft-Shutdown
o
SMPS Power-Good Window Comparator
o
VTT Power-Good Window Comparator
o
Selectable Overvoltage Protection
o
Undervoltage/Thermal Protections
o
±3mA Reference Buffer (VTTR)
Ordering Information
PART
TEMP RANGE
PIN-PACKAGE
MAX17000AETG+
-40°C to +85°C
24 Thin QFN-EP*
+Denotes
a lead(Pb)-free/RoHS-compliant package.
*EP
= Exposed pad.
Pin Configuration
TOP VIEW
DL
18
V
DD
19
PGND1 20
AGND 21
17
16
15
14
13
12
11
10
CSL
FB
REFIN
VTTI
VTT
PGND2
MAX17000A
SKIP 22
V
CC
23
SHDN 24
1
OVP
2
PGOOD1
3
PGOOD2
4
STDBY
5
VTTS
6
VTTR
*EP
9
8
7
Applications
Notebook Computers
DDR, DDR2, and DDR3 Memory Supplies
SSTL Memory Supplies
Quick-PWM is a trademark of Maxim Integrated Products, Inc.
*EXPOSED PAD
THIN QFN
4mm x 4mm
For pricing, delivery, and ordering information, please contact Maxim Direct
at 1-888-629-4642, or visit Maxim’s website at www.maximintegrated.com.
19-4307; Rev 3; 4/13
CSH
TON
BST
DH
LX
MAX17000A
Complete DDR2 and DDR3 Memory
Power-Management Solution
ABSOLUTE MAXIMUM RATINGS
TON to PGND1 .......................................................-0.3V to +28V
V
DD
to PGND1..........................................................-0.3V to +6V
V
CC
to V
DD
............................................................-0.3V to +0.3V
OVP to AGND ...........................................................-0.3V to +6V
SHDN, STDBY, SKIP
to AGND .................................-0.3V to +6V
REFIN, FB, PGOOD1,
PGOOD2 to AGND ................................-0.3V to (V
CC
+ 0.3V)
CSH, CSL to AGND ....................................-0.3V to (V
CC
+ 0.3V)
DL to PGND1..............................................-0.3V to (V
DD
+ 0.3V)
BST to PGND1...........................................................-1V to +34V
BST to LX..................................................................-0.3V to +6V
DH to LX ....................................................-0.3V to (V
BST
+ 0.3V)
BST to V
DD
.............................................................-0.3V to +28V
VTTI to PGND2 .........................................................-0.3V to +6V
VTT to PGND2 ............................................-0.3V to (V
TTI
+ 0.3V)
VTTS to AGND............................................-0.3V to (V
CC
+ 0.3V)
VTTR to AGND ..........................................-0.3V to (V
CSL
+ 0.3V)
PGND1, PGND2 to AGND.....................................-0.3V to +0.3V
Continuous Power Dissipation (T
A
= +70°C)
24-Pin, 4mm x 4mm Thin QFN
(derated 27.8mW/°C above +70°C) ..........................2222mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Soldering Temperature (reflow) .......................................+260°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V
IN
= 12V, V
CC
= V
DD
= V
SHDN
= V
REFIN
= 5V, V
CSL
= 1.8V,
STDBY
=
SKIP
= AGND,
T
A
= 0°C to +85°C,
unless otherwise noted.
Typical values are at T
A
= +25°C.) (Note 1)
PARAMETER
PWM CONTROLLER
Input Voltage Range
V
IN
V
CC
, V
DD
FB = AGND
Output-Voltage Accuracy
Output-Voltage Range
Load Regulation Error
Line Regulation Error
Soft-Start Ramp Time
Soft-Stop Ramp Time
Soft-Stop Threshold
R
TON
= 96.75k
167ns nominal
On-Time Accuracy (Note 2)
t
ON
V
IN
= 12V,
V
CSL
= 1.2V
(600kHz),
-15
-10
-15
t
SSTART
t
SSTOP
V
CSL
V
CSL
V
CSH
- V
CSL
= 0 to 18mV,
SKIP
= V
CC
V
DD
= 4.5V to 5.5V, V
IN
= 4.5V to 26V
Rising edge of
SHDN
Falling edge of
SHDN
V
IN
= 4.5V to 26V,
SKIP
= V
CC
FB = V
CC
FB = Adj
3
4.5
1.485
1.782
0.99
1
0.1
0.25
1.4
2.8
25
+15
+10
+15
%
2.1
1.500
1.800
1.000
26
5.5
1.515
1.818
1.01
2.7
V
%
%
ms
ms
mV
V
V
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
R
TON
= 200k (300kHz),
333ns nominal
R
TON
= 303.25k
(200kHz), 500ns nominal
2
Maxim Integrated
MAX17000A
Complete DDR2 and DDR3 Memory
Power-Management Solution
ELECTRICAL CHARACTERISTICS (continued)
(V
IN
= 12V, V
CC
= V
DD
= V
SHDN
= V
REFIN
= 5V, V
CSL
= 1.8V,
STDBY
=
SKIP
= AGND,
T
A
= 0°C to +85°C,
unless otherwise noted.
Typical values are at T
A
= +25°C.) (Note 1)
PARAMETER
Minimum Off-Time
Quiescent Supply Current (V
DD
)
SYMBOL
t
OFF(MIN)
I
DD
(Note 2)
FB forced above 1.0V,
STDBY
= AGND or
V
CC,
T
A
= +25°C
FB forced above 1.0V (PWM, VTT, and
VTTR blocks);
STDBY
= V
CC
FB forced above 1.0V (PWM and VTTR
blocks);
STDBY
= AGND
SHDN
= AGND, T
A
= +25°C
SHDN
= AGND, V
IN
= 26V, V
DD
= 0 or 5V,
T
A
= +25°C
1.0
VTTI = 2.8V, REFIN = 1.4V, no load
SHDN
= AGND, T
A
= +25°C
VTTI = 2.8V, REFIN = 1.4V, T
A
= +25°C
V
REFIN
-50
0.5
V
CC
-
0.3
High-side on-resistance
(source, I
VTT
= 0.1A)
Low-side on-resistance (sink, I
VTT
= 0.1A)
VTT Output-Accuracy
Source Load
(V
REFIN
- 5mV) or
(V
CSL
/2 - 5mV) to
VTTS, VTT = VTTS
V
REFIN
= 1V,
I
VTT
= +50μA
V
REFIN
= 0.5V to 1.5V,
I
VTT
= +300mA
V
REFIN
= 1V,
I
VTT
= -50μA
V
REFIN
= 0.5V to 1.5V,
I
VTT
= -300mA
+50μA to +1A
2
-4
160
16
0.1
1.0
μA
-5
+5
13
1
4
-2
17
mV/A
mV
A
μs
-5
-5
+5
mV
0.12
0.18
0.25
0.36
+5
mV
10
CONDITIONS
MIN
TYP
250
0.01
2
900
0.01
0.01
MAX
350
1.00
4
1500
5
1.00
UNITS
ns
μA
mA
μA
μA
μA
Quiescent Supply Current (V
CC
)
I
CC
Shutdown Supply Current
(V
DD
+ V
CC
)
TON Shutdown Current
LINEAR REGULATOR (VTT)
VTTI Input Voltage Range
VTTI Supply Current
VTTI Shutdown Current
REFIN Input Bias Current
REFIN Range
REFIN Disable Threshold
I
CC +
I
DD
I
TON
V
TTI
I
VTTI
2.8
50
10
+50
1.5
V
μA
μA
nA
V
V
VTT Internal MOSFET
VTT Output-Accuracy
Sink Load
VTT Load Regulation
VTT Line Regulation
VTT Current Limit
VTT Current-Limit Soft-Start Time
VTT Discharge MOSFET
VTTS Input Current
(V
REFIN
+ 5mV) or
(V
CSL
/2 + 5mV) to
VTTS, VTT = VTTS
-50μA to -1A
1.0V
Sink
V
TTI
Source
I
VTT
2.8V, I
VTT
= ±100mA
With respect to internal VTT_EN signal
OVP = V
CC
T
A
= +25°C
Maxim Integrated
3
MAX17000A
Complete DDR2 and DDR3 Memory
Power-Management Solution
ELECTRICAL CHARACTERISTICS (continued)
(V
IN
= 12V, V
CC
= V
DD
= V
SHDN
= V
REFIN
= 5V, V
CSL
= 1.8V,
STDBY
=
SKIP
= AGND,
T
A
= 0°C to +85°C,
unless otherwise noted.
Typical values are at T
A
= +25°C.) (Note 1)
PARAMETER
REFERENCE BUFFER (VTTR)
VTTR Output Accuracy (Adj)
VTTR Output Accuracy (Preset)
VTTR Maximum
Recommended Current
FAULT DETECTION (SMPS)
SMPS OVP and PGOOD1
Upper Trip Threshold
SMPS OVP and PGOOD1
Upper Trip Threshold
Fault-Propagation Delay
SMPS Output Undervoltage
Fault-Propagation Delay
SMPS PGOOD1 Lower Trip
Threshold
PGOOD1 Lower Trip Threshold
Propagation Delay
PGOOD1 Output Low Voltage
PGOOD1 Leakage Current
TON POR Threshold
FAULT DETECTION (VTT)
PGOOD2 Upper Trip Threshold
PGOOD2 Lower Trip Threshold
PGOOD2 Propagation Delay
PGOOD2 Fault Latch Delay
PGOOD2 Output Low Voltage
PGOOD2 Leakage Current
FAULT DETECTION
Thermal-Shutdown Threshold
V
CC
Undervoltage Lockout
Threshold
CSL Discharge MOSFET
T
SHDN
V
UVLO(VCC)
Hysteresis = 15°C
Rising edge, IC disabled below this level
hysteresis = 200mV
OVP = V
CC
3.8
160
4.1
16
4.4
°C
V
I
PGOOD2
t
PGOOD2
Hysteresis = 25mV
Hysteresis = 25mV
VTTS forced 50mV beyond PGOOD2
trip threshold
VTTS forced 50mV beyond PGOOD2
trip threshold
I
SINK
= 3mA
VTTS = V
REFIN
(PGOOD2 high impedance),
PGOOD2 forced to 5V, T
A
= +25°C
8
-13
10
-10
10
5
0.4
1
13
-8
%
%
μs
ms
V
μA
I
PGOOD1
V
POR(IN)
t
PGOOD1
t
OVP
FB forced 25mV above trip threshold
12
15
18
%
REFIN to VTTR
V
CSL
/2 to VTTR
Source/sink
I
VTT
= ±1mA
I
VTT
= ±3mA
I
VTT
= ±1mA
I
VTT
= ±3mA
-10
-20
-10
-20
5
+10
+20
+10
+20
mA
mV
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
10
μs
t
UVP
Measured at FB, hysteresis = 25mV
FB forced 50mV below PGOOD1 trip
threshold
I
SINK
= 3mA
FB = 1V (PGOOD1 high impedance),
PGOOD1 forced to 5V, T
A
= +25°C
Rising edge, PWM disabled below this level;
hysteresis = 200mV
-12
200
-15
10
0.4
1
3.0
-18
μs
%
μs
V
μA
V
4
Maxim Integrated
MAX17000A
Complete DDR2 and DDR3 Memory
Power-Management Solution
ELECTRICAL CHARACTERISTICS (continued)
(V
IN
= 12V, V
CC
= V
DD
= V
SHDN
= V
REFIN
= 5V, V
CSL
= 1.8V,
STDBY
=
SKIP
= AGND,
T
A
= 0°C to +85°C,
unless otherwise noted.
Typical values are at T
A
= +25°C.) (Note 1)
PARAMETER
CURRENT LIMIT
Valley Current-Limit Threshold
Current-Limit Threshold
(Negative)
Current-Limit Threshold
(Zero Crossing)
SMPS GATE DRIVERS
DH Gate-Driver On-Resistance
DL Gate-Driver On-Resistance
DH Gate-Driver Source/
Sink Current
DL Gate-Driver Source/
Sink Current
Dead Time
Internal BST Switch
On-Resistance
LX, BST Leakage Current
INPUTS AND OUTPUTS
Logic-Input Threshold
Logic-Input Current
Input Leakage Current
Input Bias Current
SHDN, STDBY, SKIP,
OVP, rising edge
hysteresis = 300mV/600mV (min/max)
SHDN, STDBY, SKIP
= 0 or V
CC
,
T
A
= +25°C
CSH = 0 or V
CC
, T
A
= +25°C
CSL = 0 or V
CC
1.30
-1
-1
55
1.65
2.00
+1
+1
100
V
μA
μA
μA
R
DH
R
DL
I
DH
I
DL(SRC)
I
DL(SNK)
t
DEAD
R
BST
BST - LX forced to 5V
DL high
DL low
DH forced to 2.5V, BST - LX forced to 5V
DL forced to 2.5V
DL forced to 2.5V
DL rising, T
A
= +25°C
DL falling, T
A
= +25°C
I
BST
= 10mA,
V
DD
= 5V internal design target
V
BST
= V
LX
= 26V,
SHDN
= AGND,
T
A
= +25°C
10
15
1.5
1.5
0.6
1
1
3
25
35
4.5
0.001
20
μA
5.0
5.0
3.0
A
A
ns
V
LIMIT
V
NEG
V
ZX
V
CSH
- V
CSL
V
CSH
- V
CSL
,
SKIP
= V
CC
V
PGND1
- V
LX
17
20
-23
1
25
mV
mV
mV
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Maxim Integrated
5
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