64 Mbit (x16) Advanced Multi-Purpose Flash Plus
A Microchip Technology Company
SST38VF6401 / SST38VF6402 / SST38VF6403 / SST38VF6404
Data Sheet
The SST38VF6401/6402/6403/6404 are 4M x16 CMOS Advanced Multi-Purpose
Flash Plus (Advanced MPF+) devices manufactured with SST proprietary, high-
performance CMOS Super- Flash technology. The split-gate cell design and thick-
oxide tunneling injector attain better reliability and manufacturability compared
with alternate approaches. The SST38VF6401/6402/6403/6404 write (Program or
Erase) with a 2.7-3.6V power supply. This device conforms to JEDEC standard
pin assignments for x16 memories.
Features
• Organized as 4M x16
• Single Voltage Read and Write Operations
– 2.7-3.6V
• Fast Erase Times:
– Sector-Erase Time: 18 ms (typical)
– Block-Erase Time: 18 ms (typical)
– Chip-Erase Time: 40 ms (typical)
• Superior Reliability
– Endurance: 100,000 Cycles minimum
– Greater than 100 years Data Retention3
• Erase-Suspend/-Resume Capabilities
• Fast Word and Write-Buffer Programming Times:
– Word-Program Time: 7 µs (typical)
– Write Buffer Programming Time: 1.75 µs / Word (typical)
- 16-Word Write Buffer
• Low Power Consumption (typical values at 5 MHz)
– Active Current: 4 mA (typical)
– Standby Current: 3 µA (typical)
– Auto Low Power Mode: 3 µA (typical)
• Automatic Write Timing
– Internal V
PP
Generation
• 128-bit Unique ID
• Security-ID Feature
– 256 Word, user One-Time-Programmable
• End-of-Write Detection
– Toggle Bits
– Data# Polling
– RY/BY# Output
• Protection and Security Features
– Hardware Boot Block Protection/WP# Input Pin, Uni-
form (32 KWord) and Non-Uniform (8 KWord) options
available
– User-controlled individual block (32 KWord) protection,
using software only methods
– Password protection
• CMOS I/O Compatibility
• JEDEC Standard
– Flash EEPROM Pinouts and command sets
• CFI Compliant
• Packages Available
– 48-lead TSOP
– 48-ball TFBGA
• Hardware Reset Pin (RST#)
• Fast Read and Page Read Access Times:
– 90 ns Read access time
– 25 ns Page Read access times
- 4-Word Page Read buffer
• All devices are RoHS compliant
• Latched Address and Data
©2011 Silicon Storage Technology, Inc.
www.microchip.com
DS-25015A
04/11
64 Mbit (x16) Advanced Multi-Purpose Flash Plus
A Microchip Technology Company
SST38VF6401 / SST38VF6402 / SST38VF6403 / SST38VF6404
Data Sheet
Product Description
The SST38VF6401, SST38VF6402, SST38VF6403, and SST38VF6404 devices are 4M x16 CMOS
Advanced Multi-Purpose Flash Plus (Advanced MPF+) manufactured with SST proprietary, high-per-
formance CMOS SuperFlash technology. The split-gate cell design and thick-oxide tunneling injector
attain better reliability and manufacturability compared with alternate approaches. The SST38VF6401/
6402/6403/6404 write (Program or Erase) with a 2.7-3.6V power supply. These devices conform to
JEDEC standard pin assignments for x16 memories.
Featuring high performance Word-Program, the SST38VF6401/6402/6403/6404 provide a typical Word-
Program time of 7 µsec. For faster word-programming performance, the Write-Buffer Programming
feature, has a typical word-program time of 1.75 µsec. These devices use Toggle Bit or Data# Polling
to indicate Program operation completion. In addition to single-word Read, Advanced MPF+ devices
provide a Page-Read feature that enables a faster word read time of 25 ns, for words on the same
page.
To protect against inadvertent write, the SST38VF6401/6402/6403/6404 have on-chip hardware and
Software Data Protection schemes. Designed, manufactured, and tested for a wide spectrum of appli-
cations, these devices are available with 100,000 cycles minimum endurance. Data retention is rated
at greater than 100 years.
The SST38VF6401/6402/6403/6404 are suited for applications that require the convenient and econom-
ical updating of program, configuration, or data memory. For all system applications, Advanced MPF+
significantly improve performance and reliability, while lowering power consumption. These devices
inherently use less energy during Erase and Program than alternative flash technologies. The total
energy consumed is a function of the applied voltage, current, and time of application. For any given
voltage range, the SuperFlash technology uses less current to program and has a shorter erase time;
therefore, the total energy consumed during any Erase or Program operation is less than alternative
flash technologies.
These devices also improve flexibility while lowering the cost for program, data, and configuration stor-
age applications. The SuperFlash technology provides fixed Erase and Program times, independent of
the number of Erase/Program cycles that have occurred. Therefore, the system software or hardware
does not have to be modified or de-rated as is necessary with alternative flash technologies, whose
Erase and Program times increase with accumulated Erase/Program cycles.
The SST38VF6401/6402/6403/6404 also offer flexible data protection features. Applications that
require memory protection from program and erase operations can use the Boot Block, Individual
Block Protection, and Advanced Protection features. For applications that require a permanent solu-
tion, the Irreversible Block Locking feature provides permanent protection for memory blocks.
To meet high-density, surface mount requirements, the SST38VF6401/6402/6403/6404 devices are
offered in 48-lead TSOP and 48-ball TFBGA packages. See Figures 2 and 3 for pin assignments and
Table 1 for pin descriptions.
©2011 Silicon Storage Technology, Inc.
DS-25015A
04/11
2
64 Mbit (x16) Advanced Multi-Purpose Flash Plus
A Microchip Technology Company
SST38VF6401 / SST38VF6402 / SST38VF6403 / SST38VF6404
Data Sheet
Functional Block Diagram
X-Decoder
SuperFlash
Memory
Memory Address
Address Buffer Latches
Y-Decoder
CE#
OE#
WE#
WP#
RESET#
I/O Buffers and Data Latches
Control Logic
DQ
15
- DQ
0
RY/BY#
1309 B1.1
Figure 1:
Functional Block Diagram
©2011 Silicon Storage Technology, Inc.
DS-25015A
04/11
3
64 Mbit (x16) Advanced Multi-Purpose Flash Plus
A Microchip Technology Company
SST38VF6401 / SST38VF6402 / SST38VF6403 / SST38VF6404
Data Sheet
Pin Assignments
A15
A14
A13
A12
A11
A10
A9
A8
A19
A20
WE#
RST#
A21
WP#
RY/BY#
A18
A17
A7
A6
A5
A4
A3
A2
A1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
Standard Pinout
Top View
Die Up
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
A16
NC
VSS
DQ15
DQ7
DQ14
DQ6
DQ13
DQ5
DQ12
DQ4
VDD
DQ11
DQ3
DQ10
DQ2
DQ9
DQ1
DQ8
DQ0
OE#
VSS
CE#
A0
1309 48-tsop P1.0
Figure 2:
Pin Assignments for 48-lead TSOP
TOP VIEW (balls facing down)
6
5
4
3
2
1
A13 A12 A14
A9
A8
A10
A15 A16 NC DQ15 VSS
A11 DQ7 DQ14 DQ13 DQ6
A19 DQ5 DQ12 VDD DQ4
A20 DQ2 DQ10 DQ11 DQ3
A5
A1
DQ0 DQ8 DQ9 DQ1
A0 CE# OE# VSS
1309 48-tfbga P1.0
WE# RST# A21
RY/BY# WP# A18
A7
A3
A17
A4
A6
A2
A B C D E F G H
Figure 3:
Pin assignments for 48-ball TFBGA
©2011 Silicon Storage Technology, Inc.
DS-25015A
04/11
4
64 Mbit (x16) Advanced Multi-Purpose Flash Plus
A Microchip Technology Company
SST38VF6401 / SST38VF6402 / SST38VF6403 / SST38VF6404
Data Sheet
Table 1:
Pin Description
Symbol
A
MS1
-A
0
Pin Name
Address Inputs
Functions
To provide memory addresses.
During Sector-Erase A
MS
-A
12
address lines will select the sector.
During Block-Erase A
MS
-A
15
address lines will select the block.
DQ
15
-DQ
0
Data Input/output To output data during Read cycles and receive input data during Write cycles.
Data is internally latched during a Write cycle.
The outputs are in tri-state when OE# or CE# is high.
WP#
RY/BY#
RST#
CE#
OE#
WE#
V
DD
V
SS
NC
Write Protect
Ready/Busy
Reset
Chip Enable
Output Enable
Write Enable
Power Supply
Ground
No Connection
Unconnected pins.
T1.0 25015
To protect the top/bottom boot block from Erase/Program operation when
grounded.
To indicate when the device is actively programming or erasing.
To reset and return the device to Read mode.
To activate the device when CE# is low.
To gate the data output buffers.
To control the Write operations.
To provide power supply voltage: 2.7-3.6V
1. A
MS
= Most significant address
A
MS
= A
21
for SST38VF6401/6402/6403/6404
©2011 Silicon Storage Technology, Inc.
DS-25015A
04/11
5
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