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SST89E516RD2-40-C-NJE: 产品描述8-bit Microcontrollers - MCU 64KB+8KB 40MHz; 产品类别嵌入式处理器和控制器微控制器和处理器; 文件大小789KB，共95页; 制造商Microchip(微芯科技); 官网地址https://www.microchip.com; 标准

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SST89E516RD2-40-C-NJE在线购买

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SST89E516RD2-40-C-NJE概述

8-bit Microcontrollers - MCU 64KB+8KB 40MHz

SST89E516RD2-40-C-NJE规格参数

参数名称	属性值
是否无铅	不含铅
是否Rohs认证	符合
厂商名称	Microchip(微芯科技)
零件包装代码	LPCC
包装说明	QCCJ, LDCC44,.7SQ
针数	44
Reach Compliance Code	compliant
ECCN代码	3A991.A.2
Is Samacsys	N
具有ADC	NO
地址总线宽度	16
位大小	8
CPU系列	8051
最大时钟频率	40 MHz
DAC 通道	NO
DMA 通道	NO
外部数据总线宽度	8
JESD-30 代码	S-PQCC-J44
JESD-609代码	e3
长度	16.5354 mm
湿度敏感等级	1
I/O 线路数量	36
端子数量	44
片上程序ROM宽度	8
最高工作温度	70 °C
最低工作温度
PWM 通道	YES
封装主体材料	PLASTIC/EPOXY
封装代码	QCCJ
封装等效代码	LDCC44,.7SQ
封装形状	SQUARE
封装形式	CHIP CARRIER
峰值回流温度（摄氏度）	245
电源	5 V
认证状态	Not Qualified
RAM（字节）	1024
ROM（单词）	67584
ROM可编程性	FLASH
座面最大高度	4.572 mm
速度	40 MHz
最大压摆率	88 mA
最大供电电压	5.5 V
最小供电电压	4.5 V
标称供电电压	5 V
表面贴装	YES
技术	CMOS
温度等级	COMMERCIAL
端子面层	Matte Tin (Sn) - annealed
端子形式	J BEND
端子节距	1.27 mm
端子位置	QUAD
处于峰值回流温度下的最长时间	40
宽度	16.5354 mm
uPs/uCs/外围集成电路类型	MICROCONTROLLER
Base Number Matches	1

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FlashFlex MCU

SST89E516RD2 / SST89E516RD

SST89V516RD2 / SST89V516RD

Data Sheet

The SST89E516RDx and SST89V516RDx are members of the FlashFlex family

of 8-bit microcontroller products designed and manufactured with SST’s patented

and proprietary SuperFlash CMOS semiconductor process technology. The split-

gate cell design and thick-oxide tunneling injector offer significant cost and reli-

ability benefits for SST’s customers. The devices use the 8051 instruction set and

are pin-for-pin compatible with standard 8051 microcontroller devices.

Features

• 8-bit 8051-Compatible Microcontroller (MCU) with

Embedded SuperFlash Memory

– Fully Software Compatible

– Development Toolset Compatible

– Pin-For-Pin Package Compatible

• Programmable Watchdog Timer (WDT)

• Programmable Counter Array (PCA)

• Four 8-bit I/O Ports (32 I/O Pins) and

One 4-bit Port

• Second DPTR register

• Low EMI Mode (Inhibit ALE)

• SPI Serial Interface

• Standard 12 Clocks per cycle, the device has an

option to double the speed to 6 clocks per cycle.

• TTL- and CMOS-Compatible Logic Levels

• Brown-out Detection

• Low Power Modes

– Power-down Mode with External Interrupt Wake-up

– Idle Mode

• SST89E516RD2 Operation

– 0 to 40 MHz at 5V

• SST89V516RD2 Operation

– 0 to 33 MHz at 3V

• 1 KByte Internal RAM

• Dual Block SuperFlash EEPROM

– 64 KByte primary block +

8 KByte secondary block

(128-Byte sector size for both blocks)

– Individual Block Security Lock with SoftLock

– Concurrent Operation during

In-Application Programming (IAP)

– Memory Overlay for Interrupt Support during IAP

• Support External Address Range up to 64 KByte

of Program and Data Memory

• Three High-Current Drive Ports (16 mA each)

• Three 16-bit Timers/Counters

• Full-Duplex, Enhanced UART

– Framing Error Detection

– Automatic Address Recognition

• Temperature Ranges:

– Commercial (0°C to +70°C)

– Industrial (-40°C to +85°C)

• Packages Available

– 40-contact WQFN (Port 4 feature not available)

– 44-lead PLCC

– 40-pin PDIP (Port 4 feature not available)

– 44-lead TQFP

• Ten Interrupt Sources at 4 Priority Levels

– Four External Interrupt Inputs

• All non-Pb (lead-free) devices are RoHS compliant

www.microchip.com

DS25093B

02/13

FlashFlex MCU

SST89E516RD2 / SST89E516RD

SST89V516RD2 / SST89V516RD

Data Sheet

Product Description

The SST89E516RDx and SST89V516RDx are members of the FlashFlex family of 8-bit microcon-

troller products designed and manufactured with SST’s patented and proprietary SuperFlash CMOS

semiconductor process technology. The split-gate cell design and thick-oxide tunneling injector offer

significant cost and reliability benefits for SST’s customers. The devices use the 8051 instruction set

and are pin-for-pin compatible with standard 8051 microcontroller devices.

The devices come with 72 KByte of on-chip flash EEPROM program memory which is partitioned into

2 independent program memory blocks. The primary Block 0 occupies 64 KByte of internal program

memory space and the secondary Block 1 occupies 8 KByte of internal program memory space.

The 8-KByte secondary block can be mapped to the lowest location of the 64 KByte address space; it

can also be hidden from the program counter and used as an independent EEPROM-like data mem-

ory.

In addition to the 72 KByte of EEPROM program memory on-chip and 1024 x8 bits of on-chip RAM,

the devices can address up to 64 KByte of external program memory and up to 64 KByte of external

RAM.

The flash memory blocks can be programmed via a standard 87C5x OTP EPROM programmer fitted

with a special adapter and the firmware for SST’s devices. During power-on reset, the devices can be

configured as either a slave to an external host for source code storage or a master to an external host

for an in-application programming (IAP) operation. The devices are designed to be programmed in-

system and in-application on the printed circuit board for maximum flexibility. The devices are pre-pro-

grammed with an example of the bootstrap loader in the memory, demonstrating the initial user pro-

gram code loading or subsequent user code updating via the IAP operation. The sample bootstrap

loader is available for the user’s reference and convenience only; SST does not guarantee its function-

ality or usefulness. Chip-Erase or Block-Erase operations will erase the pre-programmed sample code.