IRF3805S-7PPbF
IRF3805L-7PPbF
Features
l
l
l
l
l
l
Advanced Process Technology
Ultra Low On-Resistance
175°C Operating Temperature
Fast Switching
Repetitive Avalanche Allowed up to Tjmax
Lead-Free
HEXFET
®
Power MOSFET
D
V
DSS
= 55V
R
DS(on)
= 2.6mΩ
G
S
Description
This HEXFET
®
Power MOSFET utilizes the latest
processing techniques to achieve extremely low
on-resistance per silicon area. Additional features
of this design are a 175°C junction operating
temperature, fast switching speed and improved
repetitive avalanche rating . These features
combine to make this design an extremely efficient
and reliable device for use in a wide variety of
applications.
S (Pin 2, 3, 5, 6, 7)
G (Pin 1)
I
D
= 160A
D
2
Pak 7 Pin
IRF3805S-7PPbF
TO-263CA 7 Pin
IRF3805L-7PPbF
Absolute Maximum Ratings
Parameter
I
D
@ T
C
= 25°C
I
D
@ T
C
= 100°C
I
D
@ T
C
= 25°C
I
DM
P
D
@T
C
= 25°C
V
GS
E
AS
E
AS
(tested)
I
AR
E
AR
T
J
T
STG
Continuous Drain Current, V
GS
@ 10V (Silicon Limited)
Continuous Drain Current, V
GS
@ 10V (See Fig. 9)
Continuous Drain Current, V
GS
@ 10V
(Package Limited)
Pulsed Drain Current
Max.
240
170
160
1000
300
2.0
± 20
440
680
See Fig.12a,12b,15,16
-55 to + 175
300 (1.6mm from case )
10 lbf•in (1.1N•m)
Units
A
c
Maximum Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy (Thermally Limited)
Single Pulse Avalanche Energy Tested Value
Avalanche Current
W
W/°C
V
mJ
A
mJ
°C
c
h
d
Repetitive Avalanche Energy
Operating Junction and
Storage Temperature Range
g
Soldering Temperature, for 10 seconds
Mounting torque, 6-32 or M3 screw
Thermal Resistance
R
θJC
R
θCS
R
θJA
R
θJA
Junction-to-Case
j
Parameter
Typ.
–––
0.50
Max.
0.50
–––
62
40
Units
°C/W
Case-to-Sink, Flat, Greased Surface
Junction-to-Ambient
j
Junction-to-Ambient (PCB Mount, steady state)
ij
–––
–––
HEXFET
®
is a registered trademark of International Rectifier.
1
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© 2013 International Rectifier
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October 25, 2013
IRF3805S/L-7PPbF
Static @ T
J
= 25°C (unless otherwise specified)
Parameter
V
(BR)DSS
∆ΒV
DSS
/∆T
J
R
DS(on)
SMD
V
GS(th)
gfs
I
DSS
I
GSS
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
D
L
S
C
iss
C
oss
C
rss
C
oss
C
oss
C
oss
eff.
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Forward Transconductance
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Internal Drain Inductance
Internal Source Inductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Output Capacitance
Output Capacitance
Effective Output Capacitance
Min. Typ. Max. Units
55
–––
–––
2.0
110
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
0.05
2.0
–––
–––
–––
–––
–––
–––
130
53
49
23
130
80
52
4.5
7.5
7820
1260
610
4310
980
1540
–––
–––
2.6
4.0
–––
20
250
200
-200
200
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
pF
Conditions
V V
GS
= 0V, I
D
= 250µA
V/°C Reference to 25°C, I
D
= 1mA
mΩ V
GS
= 10V, I
D
= 140A
V V
DS
= V
GS
, I
D
= 250µA
S V
DS
= 25V, I
D
= 140A
µA V
DS
= 55V, V
GS
= 0V
V
DS
= 55V, V
GS
= 0V, T
J
= 125°C
nA V
GS
= 20V
V
GS
= -20V
nC I
D
= 140A
V
DS
= 44V
V
GS
= 10V
ns V
DD
= 28V
I
D
= 140A
R
G
= 2.4Ω
V
GS
= 10V
D
nH Between lead,
e
e
d
6mm (0.25in.)
from package
G
S
and center of die contact
V
GS
= 0V
V
DS
= 25V
ƒ = 1.0MHz, See Fig. 5
V
GS
= 0V, V
DS
= 1.0V, ƒ = 1.0MHz
V
GS
= 0V, V
DS
= 44V, ƒ = 1.0MHz
V
GS
= 0V, V
DS
= 0V to 44V
Diode Characteristics
Parameter
I
S
I
SM
V
SD
t
rr
Q
rr
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Min. Typ. Max. Units
–––
–––
–––
–––
–––
–––
–––
–––
45
35
240
A
1000
1.3
68
53
V
ns
nC
Conditions
MOSFET symbol
showing the
integral reverse
G
D
Ã
S
p-n junction diode.
T
J
= 25°C, I
S
= 140A, V
GS
= 0V
T
J
= 25°C, I
F
= 140A, V
DD
= 28V
di/dt = 100A/µs
e
e
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. (See fig. 11).
Limited by T
Jmax
, starting T
J
= 25°C,
L=0.043mH, R
G
= 25Ω, I
AS
= 140A, V
GS
=10V.
Part not recommended for use above this value.
Pulse width
≤
1.0ms; duty cycle
≤
2%.
C
oss
eff. is a fixed capacitance that gives the same
charging time as C
oss
while V
DS
is rising from 0 to 80%
V
DSS
.
Limited by T
Jmax
, see Fig.12a, 12b, 15, 16 for typical repetitive
avalanche performance.
This value determined from sample failure population. 100%
tested to this value in production.
This is applied to D
2
Pak, when mounted on 1" square PCB
( FR-4 or G-10 Material ). For recommended footprint and
soldering techniques refer to application note #AN-994.
R
θ
is measured at T
J
of approximately 90°C.
Solder mounted on IMS substrate.
2
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Submit Datasheet Feedback
October 25, 2013
IRF3805S/L-7PPbF
10000
TOP
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
10000
TOP
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
ID, Drain-to-Source Current (A)
100
BOTTOM
ID, Drain-to-Source Current (A)
1000
1000
BOTTOM
100
4.5V
10
10
1
4.5V
≤
60µs PULSE WIDTH
0.1
0.1
1
Tj = 25°C
10
1
100
1000
0.1
1
≤
60µs PULSE WIDTH
Tj = 175°C
10
100
1000
V DS, Drain-to-Source Voltage (V)
V DS, Drain-to-Source Voltage (V)
Fig 1.
Typical Output Characteristics
Fig 2.
Typical Output Characteristics
1000
Gfs, Forward Transconductance (S)
250
TJ = 25°C
200
ID, Drain-to-Source Current
(Α)
100
T J = 175°C
150
T J = 175°C
10
TJ = 25°C
100
VDS = 25V
≤60µs
PULSE WIDTH
1.0
2
4
6
8
10
50
V DS = 10V
380µs PULSE WIDTH
0
0
20
40
60
80
100
120
ID,Drain-to-Source Current (A)
VGS, Gate-to-Source Voltage (V)
Fig 3.
Typical Transfer Characteristics
Fig 4.
Typical Forward Transconductance
vs. Drain Current
3
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October 25, 2013
IRF3805S/L-7PPbF
100000
C oss = C ds + C gd
10000
VGS, Gate-to-Source Voltage (V)
VGS = 0V,
f = 1 MHZ
C iss = C gs + C gd, C ds SHORTED
C rss = C gd
12.0
ID= 140A
10.0
8.0
6.0
4.0
2.0
0.0
VDS= 64V
VDS= 40V
C, Capacitance(pF)
Ciss
Coss
1000
Crss
100
1
10
VDS, Drain-to-Source Voltage (V)
100
0
50
100
150
QG Total Gate Charge (nC)
Fig 5.
Typical Capacitance vs.
Drain-to-Source Voltage
Fig 6.
Typical Gate Charge vs.
Gate-to-Source Voltage
10000
10000
OPERATION IN THIS AREA
LIMITED BY R DS(on)
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
1000
T J = 175°C
100
T J = 25°C
1000
1msec 100µsec
100
10
10
10msec
1
VGS = 0V
0.1
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8
VSD, Source-to-Drain Voltage (V)
1
Tc = 25°C
Tj = 175°C
Single Pulse
0.1
1
DC
0.1
10
100
VDS, Drain-to-Source Voltage (V)
Fig 7.
Typical Source-Drain Diode
Forward Voltage
Fig 8.
Maximum Safe Operating Area
4
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October 25, 2013
IRF3805S/L-7PPbF
250
Limited By Package
RDS(on) , Drain-to-Source On Resistance
(Normalized)
2.5
ID = 140A
VGS = 10V
2.0
200
ID, Drain Current (A)
150
1.5
100
50
1.0
0
25
50
75
100
125
150
175
T C , Case Temperature (°C)
0.5
-60 -40 -20 0 20 40 60 80 100120140160180
T J , Junction Temperature (°C)
Fig 9.
Maximum Drain Current vs.
Case Temperature
Fig 10.
Normalized On-Resistance
vs. Temperature
1
Thermal Response ( Z thJC )
D = 0.50
0.1
0.20
0.10
0.05
0.02
0.01
SINGLE PULSE
( THERMAL RESPONSE )
τ
J
τ
J
τ
1
R
1
R
1
τ
2
R
2
R
2
R
3
R
3
τ
3
Ri (°C/W)
τ
C
0.0794
τ
0.1474
0.2737
τi
(sec)
0.000192
0.000628
0.014012
τ
1
0.01
τ
2
τ
3
Ci=
τi/Ri
Ci i/Ri
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.001
1E-005
0.0001
0.001
0.01
0.1
1
t1 , Rectangular Pulse Duration (sec)
Fig 11.
Maximum Effective Transient Thermal Impedance, Junction-to-Case
5
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October 25, 2013
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