74LV595N: 产品描述Counter Shift Registers 8-BIT SHIFT REG W/OUTPUT LATCH; 产品类别逻辑逻辑; 文件大小800KB，共20页; 制造商NXP(恩智浦); 官网地址https://www.nxp.com; 标准

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74LV595N概述

Counter Shift Registers 8-BIT SHIFT REG W/OUTPUT LATCH

74LV595N规格参数

参数名称	属性值
Source Url Status Check Date	2013-06-14 00:00:00
是否无铅	不含铅
是否Rohs认证	符合
厂商名称	NXP(恩智浦)
零件包装代码	DIP
包装说明	DIP, DIP16,.3
针数	16
Reach Compliance Code	unknown
其他特性	PARALLEL OUTPUT IS REGISTERED; UNREGISTERED SERIAL SHIFT RIGHT OUTPUT
计数方向	RIGHT
系列	LV/LV-A/LVX/H
JESD-30 代码	R-PDIP-T16
JESD-609代码	e4
长度	19.025 mm
负载电容（CL）	50 pF
逻辑集成电路类型	SERIAL IN PARALLEL OUT
最大频率@ Nom-Sup	20000000 Hz
位数	8
功能数量	1
端子数量	16
最高工作温度	125 °C
最低工作温度	-40 °C
输出特性	3-STATE
输出极性	TRUE
封装主体材料	PLASTIC/EPOXY
封装代码	DIP
封装等效代码	DIP16,.3
封装形状	RECTANGULAR
封装形式	IN-LINE
峰值回流温度（摄氏度）	NOT SPECIFIED
电源	3.3 V
传播延迟（tpd）	77 ns
认证状态	Not Qualified
座面最大高度	4.2 mm
最大供电电压 (Vsup)	3.6 V
最小供电电压 (Vsup)	1 V
标称供电电压 (Vsup)	3.3 V
表面贴装	NO
技术	CMOS
温度等级	AUTOMOTIVE
端子面层	NICKEL PALLADIUM GOLD
端子形式	THROUGH-HOLE
端子节距	2.54 mm
端子位置	DUAL
处于峰值回流温度下的最长时间	NOT SPECIFIED
触发器类型	POSITIVE EDGE
宽度	7.62 mm
最小 fmax	24 MHz
Base Number Matches	1

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74LV595

8-bit serial-in/serial-out or parallel-out shift register; 3-state

Rev. 4 — 18 March 2016

Product data sheet

1. General description

The 74LV595 is an 8 stage serial shift register with a storage register and 3-state outputs.

Both the shift and storage register have separate clocks. It is a low-voltage Si-gate CMOS

device and is pin and functionally compatible with the 74HC595 and 74HCT595.

Data is shifted on the positive-going transitions of the SHCP input. The data in the shift

input. If both clocks are connected together, the shift register will always be one clock

pulse ahead of the storage register.

The shift register has a serial input (DS) and a serial output (Q7S) for cascading the

device. It is also provided with an asynchronous reset input MR (active LOW) for all 8 shift

storage register appears at the output whenever the output enable input (OE) is LOW.

2. Features and benefits



Optimized for low voltage applications: 1.0 V to 3.6 V

Accepts TTL input levels between V

= 2.7 V and V

= 3.6 V

Typical output ground bounce < 0.8 V at V

= 3.3 V and T

amb

= 25

C

Typical HIGH-level output voltage (V

) undershoot: > 2 V at V

= 3.3 V and

amb

= 25

C

Specified from

40 C

to +85

C

and from

40 C

to +125

C

Has a shift register with direct clear

Multiple package options

Output capability:



Parallel outputs; bus driver



serial output; standard

ESD protection:



HBM JESD22-A114E exceeds 2000 V



MM JESD22-A115-A exceeds 200 V



3. Applications



Serial-to-parallel data conversion



Remote control holding register

74LV595N相似产品对比

	74LV595N	74LV595DB-T	74LV595PW	74LV595DB	74LV595D
描述	Counter Shift Registers 8-BIT SHIFT REG W/OUTPUT LATCH	Counter Shift Registers 8-BIT SHIFT REG W/OUTPUT LATCH	Counter Shift Registers 8-BIT SHIFT REG W/OUTPUT LATCH	Counter Shift Registers 8-BIT SHIFT REG W/OUTPUT LATCH	Counter Shift Registers 8-BIT SHIFT REG W/OUTPUT LATCH
是否Rohs认证	符合	符合	符合	符合	符合
厂商名称	NXP(恩智浦)	NXP(恩智浦)	NXP(恩智浦)	NXP(恩智浦)	NXP(恩智浦)
零件包装代码	DIP	SSOP	TSSOP	SSOP	SOIC
包装说明	DIP, DIP16,.3	5.30 MM, PLASTIC, MO-150, SOT338-1, SSOP-16	4.40 MM, PLASTIC, MO-153, SOT403-1, TSSOP-16	5.30 MM, PLASTIC, MO-150, SOT338-1, SSOP-16	3.90 MM, PLASTIC, MS-012, SOT109-1, SOP-16
针数	16	16	16	16	16
Reach Compliance Code	unknown	unknown	unknown	unknown	unknown
其他特性	PARALLEL OUTPUT IS REGISTERED; UNREGISTERED SERIAL SHIFT RIGHT OUTPUT	PARALLEL OUTPUT IS REGISTERED; UNREGISTERED SERIAL SHIFT RIGHT OUTPUT	PARALLEL OUTPUT IS REGISTERED; UNREGISTERED SERIAL SHIFT RIGHT OUTPUT	PARALLEL OUTPUT IS REGISTERED; UNREGISTERED SERIAL SHIFT RIGHT OUTPUT	PARALLEL OUTPUT IS REGISTERED; UNREGISTERED SERIAL SHIFT RIGHT OUTPUT
计数方向	RIGHT	RIGHT	RIGHT	RIGHT	RIGHT
系列	LV/LV-A/LVX/H	LV/LV-A/LVX/H	LV/LV-A/LVX/H	LV/LV-A/LVX/H	LV/LV-A/LVX/H
JESD-30 代码	R-PDIP-T16	R-PDSO-G16	R-PDSO-G16	R-PDSO-G16	R-PDSO-G16
JESD-609代码	e4	e4	e4	e4	e4
长度	19.025 mm	6.2 mm	5 mm	6.2 mm	9.9 mm
负载电容（CL）	50 pF	50 pF	50 pF	50 pF	50 pF
逻辑集成电路类型	SERIAL IN PARALLEL OUT	SERIAL IN PARALLEL OUT	SERIAL IN PARALLEL OUT	SERIAL IN PARALLEL OUT	SERIAL IN PARALLEL OUT
位数	8	8	8	8	8
功能数量	1	1	1	1	1
端子数量	16	16	16	16	16
最高工作温度	125 °C	125 °C	125 °C	125 °C	125 °C
最低工作温度	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C
输出特性	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE
输出极性	TRUE	TRUE	TRUE	TRUE	TRUE
封装主体材料	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
封装代码	DIP	SSOP	TSSOP	SSOP	SOP
封装形状	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
封装形式	IN-LINE	SMALL OUTLINE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, SHRINK PITCH	SMALL OUTLINE
峰值回流温度（摄氏度）	NOT SPECIFIED	260	260	260	260
传播延迟（tpd）	77 ns	77 ns	77 ns	77 ns	77 ns
认证状态	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
座面最大高度	4.2 mm	2 mm	1.1 mm	2 mm	1.75 mm
最大供电电压 (Vsup)	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V
最小供电电压 (Vsup)	1 V	1 V	1 V	1 V	1 V
标称供电电压 (Vsup)	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V
表面贴装	NO	YES	YES	YES	YES
技术	CMOS	CMOS	CMOS	CMOS	CMOS
温度等级	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE
端子面层	NICKEL PALLADIUM GOLD	NICKEL PALLADIUM GOLD	Nickel/Palladium/Gold (Ni/Pd/Au)	NICKEL PALLADIUM GOLD	NICKEL PALLADIUM GOLD
端子形式	THROUGH-HOLE	GULL WING	GULL WING	GULL WING	GULL WING
端子节距	2.54 mm	0.65 mm	0.65 mm	0.65 mm	1.27 mm
端子位置	DUAL	DUAL	DUAL	DUAL	DUAL
处于峰值回流温度下的最长时间	NOT SPECIFIED	30	30	30	30
触发器类型	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE
宽度	7.62 mm	5.3 mm	4.4 mm	5.3 mm	3.9 mm
最小 fmax	24 MHz	24 MHz	20 MHz	24 MHz	24 MHz
Base Number Matches	1	1	1	1	1
是否无铅	不含铅	-	不含铅	不含铅	不含铅
最大频率@ Nom-Sup	20000000 Hz	-	20000000 Hz	20000000 Hz	20000000 Hz
封装等效代码	DIP16,.3	-	TSSOP14,.25	SSOP14,.3	SOP14,.25
电源	3.3 V	-	3.3 V	3.3 V	3.3 V
湿度敏感等级	-	1	1	1	1

74LV595N

74LV595N在线购买

74LV595N概述

74LV595N规格参数

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74LV595N相似产品对比

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