74ACT08
QUAD 2-INPUT
AND
GATE
s
s
s
s
s
s
s
s
s
HIGH SPEED: t
PD
= 4.5ns (TYP.) at V
CC
= 5V
LOW POWER DISSIPATION:
I
CC
= 2µA(MAX.) at T
A
=25°C
COMPATIBLE WITH TTL OUTPUTS
V
IH
= 2V (MIN.), V
IL
= 0.8V (MAX.)
50Ω TRANSMISSION LINE DRIVING
CAPABILITY
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 24mA (MIN)
BALANCED PROPAGATION DELAYS:
t
PLH
≅
t
PHL
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 4.5V to 5.5V
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 08
IMPROVED LATCH-UP IMMUNITY
DIP
SOP
ORDER CODES
PACKAGE
DIP
SOP
TSSOP
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DESCRIPTION
The 74ACT08 is an advanced high-speed CMOS
QUAD 2-INPUT AND GATE fabricated with
sub-micron silicon gate and double-layer metal
wiring C
2
MOS tecnology.
The internal circuit is composed of 2 stages
including buffer output, which enables high noise
immunity and stable output.
PIN CONNECTION AND IEC LOGIC SYMBOLS
b
O
The device is designed to interface directly High
Speed CMOS systems with TTL, NMOS and
CMOS output voltage levels.
All inputs and outputs are equipped with protec-
tion circuits against static discharge, giving them
2KV ESD immunity and transient excess voltage.
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P
TUBE
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TSSOP
74ACT08B
74ACT08M
P
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T&R
74ACT08MTR
74ACT08TTR
April 2001
1/8
74ACT08
INPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
PIN No
1, 4, 9, 12
2, 5, 10, 13
3, 6, 8, 11
7
14
SYMBOL
1A to 4A
1B to 4B
1Y to 4Y
GND
V
CC
NAME AND FUNCTION
Data Inputs
Data Inputs
Data Outputs
Ground (0V)
Positive Supply Voltage
TRUTH TABLE
A
L
L
H
H
B
L
H
L
H
ABSOLUTE MAXIMUM RATINGS
Symbol
V
CC
V
I
V
O
I
IK
I
O
Parameter
te
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od
o
r
s
P
b
O
te
le
)-
(s
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u
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-O
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s)
P
t(
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P
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O
Value
Supply Voltage
DC Input Voltage
DC Output Voltage
DC Input Diode Current
DC Output Current
±
20
±
20
±
50
I
OK
DC Output Diode Current
I
CC
or I
GND
DC V
CC
or Ground Current
Storage Temperature
T
stg
T
L
±
200
300
Lead Temperature (10 sec)
ro
P
uc
d
s)
t(
L
L
L
H
Unit
V
Y
-0.5 to +7
s)
t(
uc
-0.5 to V
CC
+ 0.5
-0.5 to V
CC
+ 0.5
V
V
mA
mA
mA
mA
°C
°C
-65 to +150
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied.
RECOMMENDED OPERATING CONDITIONS
Symbol
V
CC
V
I
V
O
Parameter
Value
Unit
V
V
V
°C
ns/V
Supply Voltage
Input Voltage
Output Voltage
4.5 to 5.5
0 to V
CC
0 to V
CC
8
T
op
Operating Temperature
-55 to 125
dt/dv
Input Rise and Fall Time V
CC
= 4.5 or 5.5V (note 1)
1) V
IN
from 0.8V to 2.0V
2/8
74ACT08
DC SPECIFICATIONS
Test Condition
Symbol
Parameter
V
CC
(V)
4.5
5.5
4.5
5.5
4.5
5.5
4.5
5.5
V
OL
Low Level Output
Voltage
4.5
5.5
4.5
5.5
I
I
I
CCT
I
CC
I
OLD
Input Leakage Cur-
rent
Max I
CC
/Input
Quiescent Supply
Current
Dynamic Output
Current (note 1, 2)
5.5
5.5
5.5
5.5
V
O
= 0.1 V or
V
CC
-0.1V
V
O
= 0.1 V or
V
CC
-0.1V
I
O
=-50
µA
I
O
=-50
µA
I
O
=-24 mA
I
O
=-24 mA
I
O
=50
µA
I
O
=50
µA
I
O
=24 mA
I
O
=24 mA
V
I
= V
CC
or GND
V
I
= V
CC
- 2.1V
V
I
= V
CC
or GND
4.4
5.4
3.86
4.86
0.001
0.001
0.1
0.1
0.36
0.36
T
A
= 25°C
Min.
2.0
2.0
Typ.
1.5
1.5
1.5
1.5
4.49
5.49
0.8
0.8
4.4
5.4
3.76
4.76
0.1
0.1
Max.
Value
-40 to 85°C
Min.
2.0
2.0
0.8
0.8
4.4
5.4
3.7
Max.
-55 to 125°C
Min.
2.0
2.0
0.8
0.8
V
Max.
V
Unit
V
IH
V
IL
V
OH
High Level Input
Voltage
Low Level Input
Voltage
High Level Output
Voltage
)-
(s
so
b
ct
u
d
-O
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P
t(
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s
P
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I
OHD
V
OHD
= 3.85 V min
Test Condition
Symbol
Parameter
V
CC
(V)
V
OLD
= 1.65 V max
b
O
so
0.6
te
le
± 0.1
2
r
P
d
o
0.44
0.44
±1
1.5
20
75
-75
uc
4.7
s)
t(
0.1
0.1
V
0.5
0.5
±1
µA
1.6
80
50
-50
mA
µA
mA
mA
1) Maximum test duration 2ms, one output loaded at time
2) Incident wave switching is guaranteed on trasmission lines with impedances as low as 50Ω
et
l
P
e
Value
od
r
s)
t(
uc
AC ELECTRICAL CHARACTERISTICS
(C
L
= 50 pF, R
L
= 500
Ω,
Input t
r
= t
f
= 3ns)
T
A
= 25°C
Typ.
4.5
Max.
8.0
-40 to 85°C
Min.
1.0
Max.
9.0
-55 to 125°C
Min.
1.0
Max.
9.0
Unit
Min.
1.5
t
PLH
t
PHL
Propagation Delay
Time
5.0
(*)
ns
(*) Voltage range is 5.0V ± 0.5V
CAPACITIVE CHARACTERISTICS
Test Condition
Value
-40 to 85°C
Min.
Max.
-55 to 125°C
Min.
Max.
pF
pF
Unit
Symbol
Parameter
V
CC
(V)
5.0
5.0
T
A
= 25°C
Typ.
4
Max.
Min.
C
IN
Input Capacitance
C
PD
Power Dissipation
Capacitance (note
1)
f
IN
= 10MHz
30
1) C
PD
is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I
CC(opr)
= C
PD
x V
CC
x f
IN
+ I
CC
/4 (per gate)
3/8
74ACT08
TEST CIRCUIT
C
L
= 50pF or equivalent (includes jig and probe capacitance)
R
L
= R
1
= 500Ω or equivalent
R
T
= Z
OUT
of pulse generator (typically 50Ω)
WAVEFORM: PROPAGATION DELAYS
(f=1MHz; 50% duty cycle)
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et
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)
(s
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4/8
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