7545A
12-Bit Buffered Multiplying
Digital to Analog Converter
R
FB
R
V
REF
12-BIT MULTIPYING
DAC
12
WR
CS
INPUT DATA LATCHES
12
DB11-DBO
V
DD
DGND
OUT1
AGND
Memory
F
EATURES
:
• R
AD
-P
AK
® patented shielding against natural space radia-
tion
• Total dose hardness:
- > 100 krad (Si), depending upon space mission
• Excellent single event effects
- SEL
TH
: > 120 MeV/mg/cm
2
- SEU
TH
: > 120 MeV/mg/cm
2
using all 1’s
• Package:
- 20 pin R
AD
-P
AK
® Flat Pack
- 20 pin R
AD
-P
AK
® DIP
• Low gain temperature coefficient:
- 5 ppm/
°
C typ.
• Fast interface timing
• Single +5 V to +15 V supply
D
ESCRIPTION
:
Maxwell Technologies’ 7545A is a 12-bit CMOS-buffered mul-
tiplying DAC with internal data latches, which features a
greater than 100 krad (Si) total dose tolerance, depending
upon space mission. The 7545A features a WR pulse width of
100 ns which allows interfacing to a much wider range of fast
8-bit and 16-bit microprocessors. It is loaded by a single 12-bit
wide word under the control of the CS and WR inputs; tying
these control inputs low makes the input latches transparent
allowing unbuffered operation of the DAC. The 7545A is par-
ticularly suitable for single supply operations and applications
with wide temperature variations.
Maxwell Technologies' patented R
AD
-P
AK
® packaging technol-
ogy incorporates radiation shielding in the microcircuit pack-
age. It eliminates the need for box shielding while providing
the required radiation shielding for a lifetime in orbit or space
mission. In a GEO orbit, R
AD
-P
AK
provides greater than 100
krad (Si) radiation dose tolerance. This product is available
with screening up to Class S.
02.05.02 Rev 4
All data sheets are subject to change without notice
1
(858) 503-3300- Fax: (858) 503-3301- www.maxwell.com
©2001 Maxwell Technologies
All rights reserved.
12-Bit Buffered Multiplying
Digital to Analog Converter
T
ABLE
1. 7545A P
INOUT
D
ESCRIPTION
P
IN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
S
YMBOL
OUT 1
AGND
DGND
DB 11
DB 10
DB 9
DB 8
DB 7
DB 6
DB 5
DB 4
DB 3
DB 2
DB 1
DB 0
CS
WR
V
DD
V
REF
RFB
D
ESCRIPTION
Output Current
Analog Ground
Digital Ground
Data Bit 11 (MSB)
Data Bit 10
Data Bit 9
Data Bit 8
Data Bit 7
Data Bit 6
Data Bit 5
Data Bit 4
Data Bit 3
Data Bit 2
Data Bit 1
Data Bit 0 (LSB)
Chip Select (Active Low)
Write (Active Low)
Digital Supply Voltage
Reference Input
Feedback Resistance
7545A
Memory
T
ABLE
2. 7545A A
BSOLUTE
M
AXIMUM
R
ATINGS
P
ARAMETER
V
DD
to DGND
Digital Input Voltage to DGND
V
RFB
, V
REF
to DGND
V
PIN1
to DGND
AGND to DGND
Power Dissipation to 75
°
C
Thermal Impedance — Flat Package
Thermal Impedance — DIP Package
Operating Temperature
Storage Temperature Range
S
YMBOL
--
--
--
--
--
P
D
M
IN
-0.3
-0.3
--
-0.3
-0.3
--
--
--
-55
-65
M
AX
17
V
DD
+ 0.3
25
V
DD
+ 0.3
V
DD
+ 0.3
450
6.08
6.04
125
150
U
NIT
V
V
V
V
V
mW
°C/W
°C/W
°
C
°
C
Θ
JC
Θ
JC
--
T
S
02.05.02 Rev 4
All data sheets are subject to change without notice
2
©2001 Maxwell Technologies
All rights reserved.
12-Bit Buffered Multiplying
Digital to Analog Converter
T
ABLE
3. D
ELTA
L
IMITS
P
ARAMETER
I
DD
V
ARIATION
±10%
7545A
T
ABLE
4. 7545A S
PECIFICATIONS
(V
DD
= +5 V ±10%, T
A
= -55
TO
125
°
C
UNLESS OTHERWISE NOTED
)
T
EST
Resolution
Relative Accuracy
Differential Nonlinearity
Gain Error
1
Gain Temperature Coefficient
2
Power Supply Rejection
Output Current Settling Time
2
S
YMBOL
RES
RA
DNL
A
E
TC
AE
PSRR
t
SL
V
DD
= 5%
To 1/2LSB; OUT1 Load = 100
Ω
,
DAC Output Measured from Fall-
ing Edge of WR. CS = 0V
12-Bit Monotonic T
MIN
to T
MAX
DAC Register Loaded with 1111
1111 1111
T
EST
C
ONDITION
M
IN
12
-1/2
-1
-4
-5
-0.004
--
M
AX
--
1/2
1
4
5
0.004
2
U
NIT
Bits
LSB
LSB
LSB
ppm/
°
C
%/%
µs
Memory
Feed through Error
Reference Input Resistance (Pin
19 to Ground)
2
Digital Input High Voltage
Digital Input Low Voltage
Digital Input Leakage Current
Digital Input Capacitance
2
Output Capacitance
2
FT
R
IN
V
IH
V
IL
I
IN
C
IN
C
OUT1
t
CS
t
CH
t
WR
t
DS
t
DH
I
DD
All Digital Inputs V
IL
or V
IH
All Digital Inputs 0 or V
DD
V
IN
= 0 V or V
DD
DB0 - DB11; WR, CS
DB0 - DB11 = 0 V, WR, CS = 0V
DB0 - DB11 = V
DD
, WR, CS = 0V
10
2.4
--
-10
--
--
--
380
0
400
210
10
--
--
5 (typical)
25
--
0.8
10
20
70
200
--
--
--
--
--
2
500
mV p-p
K
Ω
V
V
µA
pF
pF
Chip Select to Write Setup Time
3
Chip Select to Write Hold Time
3
Write Pulse Width
3
Data Setup Time
3
Data Hold Time
3
Supply Current from V
DD
t
CS
> t
WR
, t
CH
> 0
nS
mA
µA
1. Measured using feedback resistor.
2. Guaranteed by design.
3. Not Tested.
02.05.02 Rev 4
All data sheets are subject to change without notice
3
©2001 Maxwell Technologies
All rights reserved.
12-Bit Buffered Multiplying
Digital to Analog Converter
T
ABLE
5. 7545A S
PECIFICATIONS
(V
DD
= +15 V ±10%, T
A
= -55
TO
125
°
C
UNLESS OTHERWISE NOTED
)
T
EST
Relative Accuracy
Differential Nonlinearity
Gain Error
1
Gain Temperature Coefficient
2
Power Supply Rejection
Output Current Settling Time
2
S
YMBOL
RA
DNL
A
E
TC
AE
PSRR
t
SL
V
DD
= 5%
To 1/2LSB; OUT1 Load = 100
Ω
,
DAC Output Measured from Fall-
ing Edge of WR. CS = 0V
12-Bit Monotonic T
MIN
to T
MAX
DAC Register Loaded with 1111
1111 1111
T
EST
C
ONDITION
M
IN
-1/2
-1
-4
-5
-0.004
--
M
AX
1/2
1
4
5
0.004
2
7545A
U
NIT
LSB
LSB
LSB
ppm/
°
C
%/%
µs
Feed through Error
Reference Input Resistance (Pin
19 to Ground)
2
Digital Input High Voltage
Digital Input Low Voltage
Digital Input Leakage Current
Digital Input Capacitance
2
Output Capacitance
2
FT
R
IN
V
IH
V
IL
I
IN
C
IN
C
OUT1
t
CS
t
CH
t
WR
t
DS
t
DH
I
DD
All Digital Inputs V
IL
or V
IH
All Digital Inputs 0 or V
DD
V
IN
= 0 V or V
DD
DB0 - DB11; WR, CS
DB0 - DB11 = 0 V, WR, CS = 0V
DB0 - DB11 = V
DD
, WR, CS = 0V
10
13.5
--
-10
--
--
--
95
0
95
80
5
--
--
5 (typical)
25
--
1.5
10
15
70
150
--
--
--
--
--
2
100
mV p-p
K
Ω
V
V
µA
pF
pF
Memory
Chip Select to Write Setup Time
Chip Select to Write Hold Time
Write Pulse Width
3
Data Setup Time
3
Data Hold Time
3
Supply Current from V
DD
t
CS
> t
WR
, t
CH
> 0
nS
mA
µA
1. Measured using feedback resistor.
2. Guaranteed by design.
02.05.02 Rev 4
All data sheets are subject to change without notice
4
©2001 Maxwell Technologies
All rights reserved.
12-Bit Buffered Multiplying
Digital to Analog Converter
F
IGURE
1. W
RITE
C
YCLE
T
IMING
D
IAGRAM
7545A
F
IGURE
2. M
ODE
S
ELECTION
T
ABLE
MODE SELECTION
WRITE MODE:
CS and WR low, DAC responds to data
bus (DB0 - DB11) inputs
HOLD MODE:
Either CS or WR high, data bus (DB0 -
DB11) is locked out; DAC holds last data
present when WR or CS assumed high
state.
Memory
02.05.02 Rev 4
All data sheets are subject to change without notice
5
©2001 Maxwell Technologies
All rights reserved.
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