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5102ALP

16-Bit, 20 KHz A/D Converter

+VDIG

DGND

-VDIG

RT

S

CLKIN

XOUT

STBY

DGND

+VDIG

TR

K1

TR

K2

CR /FIN

S

SS

H/SDL

HOLD

CH1/2

S

CLK

+LPTBIT

NC

-VDIG

DGND

+VDIG

22

23

1

44

+VANLOG

AGND

-VANLOG

S P

LEE

SCKMOD

LPTS

TATUS

+VANLOG

AIN2

-VANLOG

AGND

R FBUF

E

VR F

E

AIN1

OUTMOD

BP/UP

CODE

S

DATA

+LPTV

-LPTV

-VANLOG

AGND

+VAN

VA+

VA-

DGND

VD-

VD+

AGND

AIN1

AIN2

CH1/2

-

+

-

+

VREF

-

+

TEST

SCKMOD

-

+

Comparator

OUTMOD

CLKIN

XOUT

REFBUF

HOLD

SLEEP

RST

STBY

CODE

BP/UP

CRS/FIN

TRK1

TRK2

SSH/SDL

SDATA

Clock

Generator

Control

Calibration

SRAM

SCLK

Microcontroller

16-Bit charge

Redistribution

DAC

Memory

F

EATURES

:

• Monolithic CMOS A/D converters

- Inherent sampling architecture

- 2-channel input multiplexer

- Flexible serial output port

• Conversion time

- 5102A: 40 µ s

• Linearity error: ±0.001% FS

- Guaranteed no missing codes

• Self-calibration maintains accuracy

- Over time and temperature

• Fully latchup protected

D

ESCRIPTION

:

Maxwell Technologies’ 5102ALPRP is a 16-bit mono-

lithic CMOS analog-to-digital converter capable of 20

kHz throughput. On-chip self-calibration achieves nonlin-

earity of ±0.001% of FS and guarantees 16-bit no miss-

ing codes over the entire specified temperature range.

Offset and full-scale errors are minimized during the cali-

bration cycle, eliminating the need for external trimming.

The 5102ALP each consist of a 2-channel input multi-

plexer, DAC, conversion and calibration microcontroller,

clock generator, comparator, and serial communications

port. The inherent sampling architecture of the device

eliminates the need for an external track and hold ampli-

fier.

Maxwell Technologies' patented R

AD

-P

AK

® packaging

technology incorporates radiation shielding in the micro-

circuit package. It eliminates the need for box shielding

while improving the TID performance in most space

environments. This product is available with screening

up to Maxwell Technologies self-defined Class K.

01.17.05 R

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All data sheets are subject to change without not

ice

1

(858) 503-3300 Fax: (858) 503-3301 - www.maxwell.com

16-Bit, 20 KHz A/D Converter

T

ABLE

1. 5102ALP A

BSOLUTE

M

AXIMUM

R

ATINGS

(AGND, DGND = 0V,

ALL VOLTAGES WITH RESPECT TO GROUND

)

P

ARAMETER

DC Power Supplies:

1

Positive Digital

Negative Digital

Positive Analog

Negative Analog

Input Current, Any Pin Except Supplies

2

Analog Input Voltage (AIN and V

REF

pins)

Digital Input Voltage

Ambient Operating Temperature

Storage Temperature

1. In addition, VD+ must not be greater than (VA+) 0.3V.

2. Transient currents of up to 100 mA will not cause SCR latchup.

S

YMBOL

VD+

VD-

VA+

VA-

I

IN

V

INA

V

IND

T

A

T

STG

M

IN

-0.3

0.3

-0.3

0.3

--

(VA-) -0.3

-0.3

-15

-65

5102ALP

M

AX

6.0

-6.0

6.0

-6.0

±10

(VA+) 0.3

55

150

U

NIT

V

mA

V

o

C

o

C

Memory

T

ABLE

2. 5102ALP R

ECOMMENDED

O

PERATING

C

ONDITIONS

(AGND, DGND = 0V,

ALL VOLTAGES WITH RESPECT TO GROUND

)

P

ARAMETER

DC Power Supplies:

Positive Digital

Negative Digital

Positive Analog

Negative Analog

Analog Reference Voltage

Analog Input Voltage

1

Unipolar

Bipolar

S

YMBOL

VD+

VD-

VA+

VA-

VREF

V

AIN

AGND

-V

REF

--

V

REF

V

REF

M

IN

4.5

-4.5

4.5

-4.5

2.5

T

YP

5.0

-5.0

5.0

-5.0

4.5

M

AX

VA+

-5.5

5.5

-5.5

(VA+) -0.5

V

U

NIT

V

1. The 5102ALPRP can accept input voltage up to the analog supplies (VA+ and VA-). They will produce an output of all 1s for

inputs above V

REF

and all 0s for inputs below AGND in unipolar mode and -V

REF

in bipolar mode, with binary coding (CODE =

low).

01.17.05 R

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All data sheets are subject to change without notice

2

16-Bit, 20 KHz A/D Converter

T

ABLE

3. A

NALOG

C

HARACTERISTICS

5102ALP

(T

A

= T

MIN TO

T

MAX

; VA+, VD+ = 5V; VA-, VD- = -5V; V

REF

= 4.5V; F

ULL

-S

CALE

I

NPUT

S

INEWAVE

, 200 H

Z

; CLKIN = 1.6 MH

Z

; f

S

= 20

K

H

Z

;

B

IPOLAR

M

ODE

;

FRN M

ODE

; AIN1

AND

AIN2

TIED TOGETHER

,

EACH CHANNEL TESTED SEPARATELY

; A

NALOG

S

OURCE

I

MPEDANCE

= 50 W

WITH

1000

P

F

TO

AGND

UNLESS OTHERWISE SPECIFIED

)

P

ARAMETER

Accuracy

Resolution

1

Full Scale Error

2

Drift

3

Unipolar Offset

2

Drift

3

Bipolar Offset

2

Drift

3

Bipolar Negative Full Scale Error

2

Drift

2

Integral Nonlinearity

Differential Nonlinearity

Dynamic Performance (Bipolar Mode)

Peak Harmonic or Spurious Noise

2, 4

Total Harmonic Distortion

4

Signal-to-Noise Ratio

2, 4

0 dB Input

-60 dB Input

Noise

5

Unipolar Mode

Bipolar Mode

Analog Input

Aperture Time

Aperture Jitter

Input Capacitance

6

,

4

Unipolar Mode

Bipolar Mode

Conversion and Throughput

Conversion Time

7

Acquisition Time

8

Throughput

9, 10

Power Supplies

t

c

t

a

f

tp

--

40.625

9.375

20

--

µs

kHz

--

30

100

335

215

--

ns

ps

pF

94

--

87

--

100

0.002

90

30

35

70

--

µ Vrms

--

dB

%

dB

RES

FSE

VOFF

BOFF

BNFSE

INL

DNL

16

--

±1

±2

±1

±2

--

±1

--

±5

--

±5

--

±5

--

±5

--

±3

--

Bits

LSB

DLSB

LSB

DLSB

LSB

DLSB

LSB

DLSB

LSB

S

YMBOL

M

IN

T

YP

M

AX

U

NIT

Memory

01.17.05 R

EV

3

All data sheets are subject to change without notice

3

16-Bit, 20 KHz A/D Converter

T

ABLE

3. A

NALOG

C

HARACTERISTICS

5102ALP

(T

A

= T

MIN TO

T

MAX

; VA+, VD+ = 5V; VA-, VD- = -5V; V

REF

= 4.5V; F

ULL

-S

CALE

I

NPUT

S

INEWAVE

, 200 H

Z

; CLKIN = 1.6 MH

Z

; f

S

= 20

K

H

Z

;

B

IPOLAR

M

ODE

;

FRN M

ODE

; AIN1

AND

AIN2

TIED TOGETHER

,

EACH CHANNEL TESTED SEPARATELY

; A

NALOG

S

OURCE

I

MPEDANCE

= 50 W

WITH

1000

P

F

TO

AGND

UNLESS OTHERWISE SPECIFIED

)

P

ARAMETER

Power Supply Current

11

Positive Analog

Negative Analog

(SLEEP High) Positive Digital

Negative Digital

Power Consumption

11, 12

(SLEEP High)

(SLEEP Low)

Power Supply Rejection

13

Positive Supplies

Negative Supplies

S

YMBOL

I

A+

I

A-

I

D+

I

D-

P

do

P

ds

PSR

M

IN

--

T

YP

8.5

-7.7

0.5

-0.5

85

45

84

M

AX

12

-11

1.5

-1.5

mW

130

--

dB

--

U

NIT

mA

1. Minimum resolution for which no missing codes are guaranteed over the specified temperature range.

2. Applies after calibration at any temperature within the specified temperature range.

3. Total drift over specified temperature range after calibration at power-up at 25°C.

4. Guaranteed by characterization (5102A die).

5. Wideband noise aliased into the baseband. Referred to the input.

6. Applied only in the track mode. When converting or calibrating, input capacitance will not exceed 30 pF.

7. Conversion time scales directly to the master clock speed. The times shown are for synchronous, internal loopback (FRN

mode). In PDT, RBT, and SSC modes, asynchronrous delay between the falling edge of HOLD and the start of conversion may

add to the apparent conversion time. This delay will not exceed 1 master clock cycle + 140 ns.

8. The 5102ALPRP requires 6 clock cycles of coarse charge, followed by a minimum of 5.625 µ s of fine charge. FRN mode

allows 9 clock cycles for fine charge which provides for the minimum 5.625 µ s with a 1.6 MHz clock; however, in PDT, RBT, or

SSC modes, at clock frequencies less than 1.6 MHz, fine charge may be less than 9 clock cycles.

9. Throughput is the sum of the acquisition and conversion times. It will vary in accordance with conditions affecting acquisition

and conversion times described above.

10.Typical value (measured).

11. All outputs unloaded. All inputs at VD+ or DGND.

12.Power consumption in the sleep mode applies with no master clock applied (CLKIN held high or low).

13.With 300 mV p-p, 1 kHz ripple applied to each supply separately in the bipolar mode. Rejection improves by 6 dB in the unipo-

lar mode to 90 dB.

Memory

T

ABLE

4. 5102ALP S

WITCHING

C

HARACTERISTICS

(T

A

= T

MIN TO

T

MAX

; VA+, VD+ = 5V ± 10%; VA-, VD- = -5V ± 10%; I

NPUTS

: L

OGIC

0 = 0V, L

OGIC

1 = VD+; C

L

= 50

P

F)

P

ARAMETER

CLKIN Period

1, 2

CLKIN Low Time

CLKIN High Time

S

YMBOL

t

clk

t

clkl

t

clkh

M

IN

0.5

200

01.17.05 R

EV

3

T

YP

--

M

AX

10

--

U

NIT

µs

ns

All data sheets are subject to change without notice

4

16-Bit, 20 KHz A/D Converter

T

ABLE

4. 5102ALP S

WITCHING

C

HARACTERISTICS

5102ALP

S

YMBOL

f

xtal

t

rst

t

drrs

t

cal

t

drsh1

t

dfsh4

t

dfsh2

t

dfsh1

t

drsh

t

hold

t

dhlri

t

hcf

t

sclk

t

sckll

t

sclkh

t

dss

t

dhs

t

dts

t

slkl

t

slkh

t

ss

t

sh

t

rsclk

t

rsdl

t

hfs

t

chfs

M

IN

--

150

--

66t

clk

--

1t

clk

+ 20

300

275

1000

500

--

2t

clk

- 100

2t

clk

- 100

--

6t

clk

--

T

YP

1.6

20

--

100

2,882,040

80

--

60

--

120

--

100

140

65

2t

clk

2t

clk

--

2t

clk

2t

clk

--

7t

clk

M

AX

--

68t

clk

+ 260

--

68t

clk

+ 260

--

63t

clk

64t

clk

1t

clk

+ 10

--

150

230

125

--

2t

clk

+ 200

8t

clk

+ 200

--

U

NIT

MHz

ms

ns

tclk

ns

t

clk

t

clk

ns

t

clk

(T

A

= T

MIN TO

T

MAX

; VA+, VD+ = 5V ± 10%; VA-, VD- = -5V ± 10%; I

NPUTS

: L

OGIC

0 = 0V, L

OGIC

1 = VD+; C

L

= 50

P

F)

P

ARAMETER

Crystal Frequency

1, 2

SLEEP Rising to Oscillator Stable

3

RST Pulse Width

4

RST to STBY Falling

RST Rising to STBY Rising

CH1/2 Edge to TRK1, TRK2 Rising

5

CH1/2 Edge to TRK1, TRK2 Falling

5

HOLD to SSH Falling

6

HOLD to TRK1, TRK2, Falling

6

HOLD to TRK1, TRK2, SSH Rising

6

HOLD Pulse Width

7

HOLD to CH1/2 Edge

6

HOLD Falling to CLKIN Falling

7

PDT and RBT Modes

SCLK Input Pulse Period

SCLK Input Pulse Width Low

SCLK Input Pulse Width High

SCLK Input Falling to SDATA Valid

HOLD Falling to SDATA Valid - PDT Mode

TRK1, TRK2 Falling to SDATA Valid

8

FRN and SSC Modes

SCLK Output Pulse Width Low

SCLK Output Pulse Width High

SDATA Valid Before Rising SCLK

SDATA Valid After Rising SCLK

SDL Falling to 1st Rising SCLK

Last Rising SCLK to SDL Rising

HOLD Falling to 1st Falling SCLK

CH1/2 Edge to 1st Falling SCLK

Memory

1. Minimum CLKIN period is 0.625 µ s is FRN mode (20 kHz sample rate).

2. External loading capacitors are required to allow the crystal to oscillate. Maximum crystal frequency is 1.6 MHz in FRN mode

(20 kHz sample rate).

3. With a 2.0 MHz crystal, two 33 pF loading capacitors and a 10 MW parallel resistor.

4. Guaranteed by initial characterization (5102A die).

5. These times are for FRN mode.

6. These times are for PDT and RBT modes.

01.17.05 R

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All data sheets are subject to change without notice

5

5102ALP

5102ALP概述

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