austriamicrosystems AG
is now
ams AG
The technical content of this austriamicrosystems datasheet is still valid.
Contact information:
Headquarters:
ams AG
Tobelbaderstrasse 30
8141 Unterpremstaetten, Austria
Tel: +43 (0) 3136 500 0
e-Mail:
ams_sales@ams.com
Please visit our website at
www.ams.com
Datasheet
AS1369
200mA Ultra-Compact Low Dropout Regulator
1 General Description
The AS1369 is an ultra compact high-performance low-dropout
200mA voltage regulator designed for use with very-low ESR output
capacitors. The device can deliver superior performance in all
specifications critical to battery-powered designs, and is perfectly
suited for mobile phones, PDAs, MP3 players, and other battery
powered devices.
The AS1369 is fully operational with small input and output capacitor
of only 0.47µF offering PSRR of 72dB typical and a noise level of
30µV
RMS
.
Typical quiescent current is around 25µA while in shutdown the
AS1369 requires less than 0.1µA quiescent current.
2 Key Features
Low Dropout Voltage: typ. 40mV @ 100mA
2.0V to 5.5V Input Voltage
1.2V to 5.0V Output Voltage (in 100mV steps)
High Accuracy: ±2% Over Temperature
Thermal and Over Current Protection
25µA Quiescent Current
<0.1µA Standby Current
High PSRR: 72dB @ 1kHz
Regulation performance is excellent even under low dropout
conditions, when the power transistor has to operate in linear mode.
The AS1369 offers excellent low-noise performance requiring no
external bypass capacitance.
Multiple output voltage options between 1.2V and 5.0V in 100mV
steps are available and the minimum input voltage is as low as 2.0V
(depending on the output voltage version), so the component can be
used with the new and emerging battery technologies.
The AS1369 is available in a 4-bump WL-CSP package.
Figure 1. AS1369 - Block Diagram
C1 1µF
Te
c
www.austriamicrosystems.com/LDOs/AS1369
hn
ic a
al m
co s
A
nt G
en
ts
til
No Noise Bypass Capacitor Required
Low Noise: 30µV
RMS
Enable Pin
Package: 4-bump WL-CSP
0.5mm pitch
3 Applications
The device is ideal for mobile communication, battery powered
systems and any electronic equipment.
V
IN
AS1369
V
OUT
V
REF
_
+
C2 1µF
On/Off
Control
Thermal &
Over Current
Protection
EN
GND
Revision 1.7
lv
A2
EN
B2
V
IN
A1
GND
B1
V
OUT
(WLP; Top Through View)
al
1 - 21
id
200mA High Maximum Load Current
AS1369
Datasheet - P i n A s s i g n m e n t s
4 Pin Assignments
Figure 2. Pin Assignments (Top View)
A2
EN
B2
V
IN
A1
GND
B1
V
OUT
AS1369
(WLP; Top Through View)
4.1 Pin Descriptions
Table 1. Pin Descriptions
WLP
A1
A2
B1
B2
Te
c
www.austriamicrosystems.com/LDOs/AS1369
hn
ic a
al m
co s
A
nt G
en
ts
til
Name
GND
Description
Ground
EN
Logic-High Enable Input.
V
IH
1.2V: V
OUT
is enabled.
V
IH
0.4V: V
OUT
is disabled.
Note:
This pin is internally pulled down and must not float.
Regulated Output Voltage
V
OUT
V
IN
Input Voltage
Revision 1.7
2 - 21
lv
al
id
AS1369
Datasheet - A b s o l u t e M a x i m u m R a t i n g s
5 Absolute Maximum Ratings
Stresses beyond those listed in
Table 2
may cause permanent damage to the device. These are stress ratings only, and functional operation of
the device at these or any other conditions beyond those indicated in
Electrical Characteristics on page 4
is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Table 2. Absolute Maximum Ratings
Parameter
Electrical Parameters
Input Supply Voltage
Shutdown Input Voltage
Output Voltage
I
OUT
Input/Output Voltage
Latch-Up
Electrostatic Discharge
2
1
Min
-0.3
-0.3
-0.3
-0.3
-100
Max
+7
+7
+7
+7
+100
2
Units
V
V
V
Comments
V
mA
kV
V
Norm: JEDEC 78
Temperature Ranges and Storage Conditions
Operating Junction Temperature
Storage Temperature Range
Package Body Temperature
1. The AS1369 uses an internal protective structure against light influence. However, exposing the WLP package to direct light could
cause device malfunction.
2. The output PNP structure contains a diode between pins V
IN
and V
OUT
that is normally reverse-biased. reversing the polarity of pins
V
IN
and V
OUT
will activate this diode.
3. Exceeding the maximum allowable dissipation will cause excessive device temperature and the regulator will go into thermal shutdown.
Te
c
www.austriamicrosystems.com/LDOs/AS1369
hn
ic a
al m
co s
A
nt G
en
ts
til
ESD
Norm: MIL 883 E method 3015
500
CDM JESD22-C101C methods
Thermal Resistance,
JA
3
345
ºC/W
The maximum allowable power dissipation is a function of the
maximum junction temperature (T
J(MAX
), the junction-to-
ambient thermal resistance (
JA
), and the ambient
temperature (T
AMB
). The maximum allowable power
dissipation at any ambient temperature is calculated as:
(EQ 1)
P
(MAX)
= (T
J(MAX)
- (T
AMB
))/
JA
Where:
The value of
JA
for the WLP package is 345°C/W.
-40
+125
ºC
-65
+150
ºC
+260
ºC
The reflow peak soldering temperature (body temperature)
specified is in accordance with
IPC/JEDEC J-STD-020
“Moisture/Reflow Sensitivity Classification for Non-Hermetic
Solid State Surface Mount Devices”.
Revision 1.7
lv
3 - 21
Short-circuit protected
al
id
AS1369
Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s
6 Electrical Characteristics
T
AMB
=
-40°C to +85°C,
V
IN
= V
OUT(NOM)
+ 0.5V, C
OUT
= C
IN
= 0.47µF, I
OUT
= 1mA, V
IH
= 1.2V (unless otherwise specified)
Table 3. Electrical Characteristics
Symbol
T
AMB
Parameter
Operating Temperature Range
Operational Voltage Range
Input Undervoltage Lockout
Accuracy
Condition
Min
-40
2.0
-0.7
-2
20
40
60
80
0.02
0.02
0.001
0.001
50
Typ
Max
+85
5.5
+0.7
+2
Unit
ºC
V
V
%
1.8
Over full V
IN
, V
OUT
, T
AMB
=
25°C
including line and load regulation
Over full V
IN
, V
OUT
and temperature
including line and load regulation
I
OUT
= 50mA
I
OUT
= 100mA
I
OUT
= 150mA
I
OUT
= 200mA
V
IN
= V
OUT(NOM)
+ 0.5V to 5.5V, V
OUT
2.5V
V
IN
= V
OUT(NOM)
+ 0.5V to 5.5V, V
OUT
2.5V
I
OUT
= 5 to 100mA
I
OUT
= 5 to 200mA
I
OUT
= 5mA
V
DROP
Dropout Voltage
1
hn
ic a
al m
co s
A
nt G
en
ts
til
Line Regulation
Load Regulation
Output voltage/temperature
Output current
Quiescent current
Standby current
Turn On Time
2
V
OUT
V
OUT
/
T
AMB
I
Q
I
SHDN
t
ON
Maximum output current
I
LOAD
= 0mA
I
LOAD
= 200mA
In Shutdown
210
I
OUT
= 10mA, f = 1kHz, V
OUT
= 1.5V
PSRR
I
OUT
= 10mA, f = 100kHz, V
OUT
= 1.5V
Load transient response
Output Noise Voltage
Enable Input Current
eN
I
EN
I
OUT
= 10mA, f = 1kHz, V
OUT
= 2.8V
I
OUT
= 10mA, f = 100kHz, V
OUT
= 2.8V
1 to 150mA, T
rise
= T
fall
= 1µs,
C
OUT
= C
IN
= 1µF, ESR load capacitor = 0
BW = 400Hz to 80kHz, C
OUT
= 1µF,
I
OUT
= 30mA
V
EN
= 0.4V, V
IN
= 5.5V
V
IN
= 2.0V to 5.5V, T
AMB
= -40°C to 85°C
I
OUT
= 0mA
V
OUT
= 0V
V
EN
I
IN(start)
I
SC
T
OFF
Enable Input Logic Low
Enable Input Logic High
Startup Peak Current
Short Circuit Current
Temperature Shutdown
Output Capacitor
1.2
210
Te
c
C
OUT
Temperature rising
Hysteresis
Load Capacitor Range
Maximum ESR Load
0.47
0.5
1. Dropout voltage is the input-to-output voltage difference at which the output voltage is 100mV below its nominal value (does not apply to
input voltages below 2.0V).
2. Turn on time is time measured between the enable input just exceeding the V
EN
high value and the output voltage just reaching 95% of
its nominal value.
www.austriamicrosystems.com/LDOs/AS1369
Revision 1.7
lv
mV
%/V
%/mA
ppm/°C
mA
µA
µA
nA
µs
dB
dB
dB
dB
mV
µV
RMS
µA
V
mA
mA
ºC
µF
25
35
5
50
60
500
30
72
55
80
56
±65
30
±1
0.4
340
350
160
20
4 - 21
al
50
100
150
200
0.1
0.2
0.003
0.003
id
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
