USER’S MANUAL
ISL85415DEMO2Z
Demonstration Board
AN1945
Rev 1.00
June 1, 2015
Description
The ISL85415DEMO2Z kit is intended for use in point-of-load
applications sourcing from 3V to 36V. The kit is used to
demonstrate the performance of the
ISL85415
wide V
IN
low
quiescent current high efficiency synchronous buck regulator
using an isolated secondary output.
The ISL85415 is offered in a 4mmx3mm 12 Ld DFN package
with 1mm maximum height. The converter occupies
1.138cm
2
area.
Key Features
• Wide input voltage range 3V to 36V
• Synchronous operation for high efficiency
• Integrated high-side and low-side NMOS devices
• Programmable switching frequency (fixed or externally)
• Continuous output current up to 300mA (refer to
Figures 10
and
11)
• Internal or external soft-start
• Minimal external components required
• Power-good function available for primary output
Specifications
• This board has been configured and optimized for the
following operating conditions:
• V
IN
= 3V to 36V
• V
OUT
= 0.6V to 12V
• I
MAX
= 300mA with ±1% secondary output regulation
(at V
OUT
= 3.3V, V
IN
= 12V)
• Board temperature: +25°C
Recommended Equipment
The following materials are recommended to perform testing:
• 0V to 50V power supply with at least 1A source current
capability
• Electronic loads capable of sinking current up to 1A
• Digital Multimeters (DMMs)
• 100MHz quad-trace oscilloscope
References
•
ISL85415
Datasheet
Ordering Information
PART NUMBER
ISL85415DEMO2Z
DESCRIPTION
Demonstration board with Isolated
Outputs
FIGURE 1. FRONT OF EVALUATION BOARD ISL85415DEMO2Z
FIGURE 2. BACK OF EVALUATION BOARD ISL85415DEMO2Z
AN1945 Rev 1.00
June 1, 2015
Page 1 of 7
ISL85415DEMO2Z
Quick Set up Guide
1. Ensure that the circuit is correctly connected to the supply and
loads prior to applying any power.
2. Connect the bias supply to VIN, the plus terminal to VIN (P4)
and the negative return to GND (P5).
3. Turn on the power supply.
4. Without any load applied on the output, verify that the output
voltage is 3.3V for V
OUT1
(P7).
If the output voltage desired is 0.6V, then R
1
is shorted. Please
note that if V
OUT
is less than 1.8V, the switching frequency and
compensation must be changed for 300kHz operation due to
minimum on-time limitation. Please refer to datasheet
ISL85415
for further information.
Table 1
shows external component selection for different desired
V
OUT.
The curves in
Figure 10
indicate the secondary output voltage
regulation versus the load applied in the secondary output,
without any load on the primary output for V
OUT
= 5V, at different
input voltages. The curves in
Figure 11
indicate the secondary
output voltage regulation versus the load applied in the
secondary output, without any load on the primary output for
V
OUT
= 3.3V, at different input voltages.
PCB Layout Guidelines
The ISL85415EVAL2Z PCB layout has been optimized for
electrical and thermal performance. Proper layout of the power
converter will minimize EMI and noise while insuring first pass
success of the design.
PCB layout is provided on the Intersil web site. A multilayer
printed circuit board with GND plane is recommended. The most
critical connections are to tie the PGND pin to the package GND
pad and then use vias to directly connect the GND pad to the
system GND plane. This connection of the GND pad to system
plane insures a low impedance path for all return current, as well
as an excellent thermal path to dissipate heat.
With this connection made, place the high frequency MLCC input
capacitors C
1
, C
2
near the VIN pin and use vias directly at the
capacitor pads to tie the capacitors to the system GND plane.
Also, use vias directly at the C
5
, C
6
output capacitor pads to tie
the capacitors to the system GND plane. These measures will
minimize the high dV/dt and dI/dt loops. Minimize the PHASE
connection by placing L
1
very close to the IC. Place a 1µF MLCC
near the VCC pin and directly connect its return with a via to the
system GND plane. Keep the power components path (L
1
, C
1
, C
2
,
C
3
, C
5
, C
6
) separated from the small signal nodes (FB, COMP)
and the control components path (FS, SS) by placing the
feedback divider close to the FB pin and do not route any
feedback components near PHASE or BOOT. If external
components are used for SS, COMP or FS, the same advice
applies. Connect these control components and small signal
noise components to the system GND. Keep the small signal
nodes traces (FB, COMP) as short as possible.
Frequency Control
The ISL85415 has an FS pin that controls the frequency of
operation. Programmable frequency allows for optimization
between efficiency and external component size. It also allows low
frequency operation for low V
OUTs
when minimum on-time would
limit the operation otherwise. Default switching frequency is
500kHz when FS is tied to V
CC
(R
10
= 0). By removing R
10
the
switching frequency could be changed from 300kHz (R
12
= 340k)
to 2MHz (R
12
= 32.4k). Please refer to datasheet
ISL85415
for
calculating the value of R
12
. Do not leave this pin floating.
Disabling/Enabling Function
The ISL85415DEMO2Z board has the EN pin tied to VIN via R
7
.
This keeps the part enabled all the time. To disable the part,
remove R
7
and populate R
8
with a 0Ω resistor.
SYNC Control
The ISL85415 evaluation board has a SYNC pin that allows
external synchronization frequency to be applied. Default board
configuration has R
6
= 200k to V
CC
, which defaults to PWM
operation mode and also to the preselected switching frequency
set by R
12
(see
ISL85415
datasheet and previous section
“Frequency Control”
for details). If this pin is tied to GND, the IC
will operate in PFM mode. For PFM operation, remove R
6
and
populate R
9
with 0Ω resistor.
Evaluating the Other Output Voltage
The ISL85415DEMO2Z kit output is preset to 3.3V; however,
output voltages can be adjusted from 0.6V to 15V. The output
voltage programming resistor, R
2
, will depend on the desired
output voltage of the regulator and the value of the feedback
resistor R
1
, as shown in
Equation 1.
0.6
R
2
=
R
1
---------------------------
V
–
0.6
OUT
Soft-start/COMP Control
R
15
selects between internal (R
15
= 0) and external soft-start.
R
11
selects between internal (R
11
= 0) and external
compensation. Please refer to the Pin Description table of the
ISL85415
datasheet.
(EQ. 1)
TABLE 1. EXTERNAL COMPONENT SELECTION
V
OUT
(V)
12
5
3.3
2.5
1.8
L
1
(µH)
45
22
22
22
22
C
OUT
(µF)
10
2x22
2x22
2x22
22
R
1
(kΩ)
90.9
90.9
90.9
90.9
100
R
2
(kΩ)
4.75
12.4
20
28.7
50
C
FB
(pF)
22
100
100
100
22
R
FS
(kΩ)
115
120
120
120
120
R
COMP
(kΩ)
100
100
100
100
50
C
COMP
(pF)
470
470
470
470
470
AN1945 Rev 1.00
June 1, 2015
Page 2 of 7
ISL85415DEMO2Z
ISL85415DEMO2Z Schematic
P10
CSS
0.033µF
VCC
R
15
OPEN
SS
VIN
P4
SYNC
C
3
VIN
16
3
1
PRI
BOOT
0.1µF
1
2
3
4
6
L
1
750314712
22µH
A
2
GND
D1
P3
1
R
14
1.05k
C
10
1µF
VOUT SEC
3.3V
VOUT PR
P7
13
A
A
U1
TKSS
SYNC
BOOT
VIN
PHASE
PGND
EP
ISL85415
A
A
FS
COMP
FB
VCC
PG
EN
C
8
FS OPEN
12
11 COMP
10 FB
9 VCC
8 PG
7 EN
C
9
1µF
R
2
20k
C
4
100PF
R
12
120k
R
10
VCC
OPEN
C
7
470pF
R
3
100k
R
11
OPEN
VO
R
1
90.9k
PHASE 5
C
11
150µF
P5
2
C
1
10µF
C
2
10µF
SEC
4
GND
P9
A
1N5819HW
A
R
13
1.05k
VO
C
6
22µF
C
5
22µF
3.3V
A
VCC
P8
VCC
R
6
200k
PG
P1
SYNC
P2
R
9
OPEN
P6
R
8
OPEN
EN
R
7
200k
VIN
A
A
NOTE: If the IC is used in an application where the input test leads have large parasitic inductance, the input electrolytic
capacitor C
11
may be added to prevent transient voltages on the input pin.
FIGURE 3. ISL85415DEMO2Z SCHEMATIC
AN1945 Rev 1.00
June 1, 2015
Page 3 of 7
ISL85415DEMO2Z
ISL85415DEMO2Z Bill of Materials
MANUFACTURER PART
EEE-FK1H151P
GRM188R71E105KA12D
04025A101FAT2A
GRM36X7R333K016AQ
ECJ-0EB1H471K
06035C104KAT2A
GRM188R61C105KA12D
C3216X5R1H106K
ECJ-DV50J226M
1514-2
5002
1N5819HW-7-F
ISL85415FRZ
750314712
QTY
1
1
1
1
1
0
1
1
2
2
5
5
1
1
1
0
ERJ2RKF1003
ERJ-2RKF1051X
MCR01MZPF1203
ERJ2RKF2001
MCR01MZPF2003
CRCW040290K9FKED
D810 (212403-012)
LABEL-DATE CODE
ISL85415DEMO2ZREVAPCB
1
2
1
1
2
1
1
1
1
UNIT
ea.
ea.
ea.
ea.
ea.
ea.
ea.
ea.
ea.
ea.
ea.
ea.
ea.
ea.
ea.
ea.
ea.
ea.
ea.
ea.
ea.
ea.
ea.
ea.
ea.
REFERENCE DESIGNATOR
C11 (OPTIONAL)
C10
C4
CSS
C7
C8
C3
C9
C1, C2
C5, C6
P3, P4, P5, P7, P9
P1, P2, P6, P8, P10
D1
U1
L1
R8-R11, R15
R3
R13, R14
R12
R2
R6, R7
R1
PLACE ASSY IN BAG
AFFIX TO BACK OF PCB
DESCRIPTION
CAP, SMD, 10.3mm, 150µF, 50V, 20%, ROHS,
ALUM.ELEC.
CAP, SMD, 0603, 1µF, 25V, 10%, X7R, ROHS
CAP, SMD, 0402, 100pF, 50V, 1%, NP0, ROHS
CAP, SMD, 0402, 33nF, 16V, 10%, X7R, ROHS
CAP, SMD, 0402, 470pF, 50V, 10%, X7R, ROHS
CAP, SMD, 0402, DNP-PLACE HOLDER, ROHS
CAP, SMD, 0603, 0.1µF, 50V, 10%, X7R, ROHS
CAP, SMD, 0603, 1µF, 16V, 10%, X5R, ROHS
CAP, SMD, 1206, 10µF, 50V, 10%, X5R, ROHS
CAP, SMD, 1206, 22µF, 6.3V, 20%, X5R, ROHS
CONN-TURRET, TERMINAL POST, TH, ROHS
CONN-MINI TEST POINT, VERTICAL, WHITE, ROHS
DIODE-RECTIFIER, SMD, 2P, SOD-123, 40V, 1A,
ROHS
TRANSFORMER- CUSTOM, SMD, 6P, 10.16 x11.66,
22µH, 10%, 2.5A, ROHS
RES, SMD, 0402, DNP, DNP, DNP, TF, ROHS
RES, SMD, 0402, 100k, 1/16W, 1%, TF, ROHS
RES, SMD, 0402, 1.05k, 1/16W, 1%, TF, ROHS
RES, SMD, 0402, 120k, 1/16W, 1%, TF, ROHS
RES, SMD, 0402, 20k, 1/16W, 1%, TF, ROHS
RES, SMD, 0402, 200k, 1/16W, 1%, TF, ROHS
RES, SMD, 0402, 90.9k, 1/16W, 1%, TF, ROHS
BAG, STATIC, 3X5, ZIP LOC
LABEL-DATE CODE_LINE 1: YRWK/REV#,
LINE 2: BOM NAME
PWB-PCB, ISL85415DEMO2Z, REVA, ROHS
PANASONIC
PANASONIC
ROHM
PANASONIC
ROHM
VISHAY/DALE
INTERSIL COMMON
STOCK
INTERSIL
IMAGINEERING INC
AVX
MURATA
TDK
PANASONIC
KEYSTONE
KEYSTONE
DIODES, INC.
MANUFACTURER
PANASONIC
MURATA
AVX
MURATA
PANASONIC
IC-500mA BUCK REGULATOR, 12P, DFN, 3X4, ROHS INTERSIL
WURTH ELECTRONICS
MIDCOM INC.
ISL85415DEMO2Z Board Layout
FIGURE 4. SILKSCREEN TOP
FIGURE 5. TOP LAYER
AN1945 Rev 1.00
June 1, 2015
Page 4 of 7
ISL85415DEMO2Z
ISL85415DEMO2Z Board Layout
(Continued)
FIGURE 6. LAYER 2
FIGURE 7. LAYER 3
FIGURE 8. BOTTOM LAYER
FIGURE 9. SILKSCREEN BOTTOM
AN1945 Rev 1.00
June 1, 2015
Page 5 of 7
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