USER’S MANUAL
ISL70219ASEH
Evaluation Board User’s Guide
UG007
Rev.0.00
October 31, 2014
Introduction
The ISL70219ASEHEV1Z evaluation platform is designed to
evaluate the ISL70219ASEH. The ISL70219ASEH contains two
very high precision amplifiers featuring the perfect combination
of low noise vs power consumption. Low offset voltage, low I
BIAS
current and low temperature drift making them the ideal choice
for applications requiring both high DC accuracy and AC
performance. The combination of high precision, low noise, low
power and small footprint provides the user with outstanding
value and flexibility relative to similar competitive parts.
Applications for these amplifiers include precision active
filters, medical and analytical instrumentation, precision
power supply controls, and industrial controls.
The ordering number for this board is ISL70219ASEHEV1Z.
Please go to ordering tab on the landing page for the
ISL70219ASEH.
Key Features
• Wide V
IN
range single supply or dual supply
- ±2.25V to ±18V
- +4.5V to +36V
• Singled-ended or differential input operation
• External VREF input
• Banana Jack connectors for power supply and VREF inputs
• BNC connectors for op amp input and output terminals
• Convenient PCB pads for op amp input/output impedance
loading.
Specifications
• V+ range: +2.25V to 18V
• V- range: -2.25V to -18V
• Common mode input range: 2V within V+ and V- rails.
Related Literature
•
ISL70219ASEH
Datasheet
• ISL70219ASEH SMD
5962-14226
• ISL70219ASEH Radiation Test Report
•
TR002
Single Event Effects (SEE) Testing of the
ISL70219ASEH Dual Operational Amplifier
Ordering Information
PART NUMBER
ISL70219ASEHEV1Z
DESCRIPTION
Evaluation Board
FIGURE 1. ISL70219ASEHEV1Z EVALUATION BOARD
UG007 Rev.0.00
October 31, 2014
Page 1 of 9
ISL70219ASEH
RF
100kΩ
IN-
RIN-
+
-
-
+
+
-
IN-
10kΩ
IN+
IN+
VCM
VREF
RIN+
10kΩ
RREF+
100kΩ
IN+
+
VN
RL
DNP
IN-
-
V+
V-
0Ω
VOUT
VP
ISL70219 (1/2)
VREF
GND
FIGURE 2. BASIC AMPLIFIER CONFIGURATION
Power Supplies
External power connections are made through the +V, -V, VREF
and Ground connections on the evaluation board. For single
supply operation, the -V and Ground pins are tied together to the
power supply negative terminal. For split supplies, +V and -V
terminals connect to their respective power supply terminals.
Decoupling capacitors C
2
, C
3
, C
4
and C
6
connect to their
respective supplies through R
11
and R
15
resistors. These
resistors are 100Ω but can be changed by the user to provide
additional power supply filtering, or to reduce the voltage rate of
rise to less than ±1V/µs. Two additional capacitors, C5 and C
7
,
are connected close to the part to filter out high frequency noise.
Anti-reverse diode D
1
protects the circuit in the momentary case
of accidentally reversing the power supplies to the evaluation
board. The VREF pin can be connected to ground to establish a
ground referenced input for split supply operation, or can be
externally set to any reference level for single supply operation.
PCB Layout Considerations
There a few layout constraints to consider when using the
ISL70219ASEH, but this will generally apply to any generic
operational amplifier. Analog circuits can conduct noise
through paths that connect it to the “outside world”. These
paths include the V+, V-, IN+, IN- and OUT terminals. It’s
important to make sure these paths are kept away from
known noise sources to ensure optimal performance of the
part. If the ISL70219ASEH resides on the same boards as
digital circuitry it is necessary to decouple the power pins on
the analog as well as the digital circuitry. This is done on the
evaluation board with C
2
through C
7
, with the lower value
capacitors, C
5
and C
7
, placed near the V- and V+ pins
respectively to minimize high frequency noise.
J5
V-
J6
J7
V+ J8
J9
VREF
J10
R11
100
R15
Amplifier Configuration
A simplified schematic of the evaluation board is shown in
Figure 3.
The input stage with the components supplied is
shown in
Figure 4,
with a closed loop gain of 10V/V. The
differential amplifier gain is expressed in
Equation 1:
V
OUT
=
V
IN+
–
V
IN-
R
F
R
IN
+
V
REF
(EQ. 1)
C2
1µF
D1
C3
C4
1µF
C6
0.1µF
C7
0.01µF
0.1µF
For single-ended input with an inverting gain G = -10V/V, the
IN+ input is grounded and the signal is supplied to the IN-
input. The VREF can be connected to a reference voltage
between the V+ and V- supply rails. For non-inverting operation
with G = 11V/V, the IN- input is grounded and the signal is
supplied to the IN+ input. The non-inverting gain is strongly
dependent on any resistance from IN- to GND. For good gain
accuracy, a 0Ω resistor should be installed on the empty R
5
pad. The VREF pin must be connected to ground to establish a
ground referenced input for dual supply operation, or can be
externally set to any reference level for single supply
operation. The VREF should not be left floating.
C5
0.01µF
FIGURE 3. POWER SUPPLY CIRCUIT
UG007 Rev.0.00
October 31, 2014
100
Page 2 of 9
ISL70219ASEH
J1
R
1
DNP
J2
R
2
DNP
R
3
DNP
0
R
5
R
4
10k
R
9
100k
C
1
OPEN
VREF
R
12
100k
FROM OUTPUT
OUTPUT
IN-
IN+
C
6
OPEN
R
28
DNP
OPEN
R
26
0
R10
10k
R
6
DNP
FIGURE 4. INPUT STAGE (1/2)
FIGURE 5. OUTPUT STAGE (1/2)
User-selectable Options
Component pads are included to enable a variety of
user-selectable circuits to be added to the amplifier VREF, inputs,
outputs, and the amplifier feedback loops.
A voltage divider (Figure
4,
R
6
and R
12
) can be added to
establish a power supply-tracking common mode reference
using the VREF input. The input stages (see
Figure 4)
have
additional resistor and/or capacitor pads that may be used to
add voltage divider networks or feedback networks for adding
input attenuation, or to establish input DC offsets through the
VREF pin. The output stages (see
Figure 5)
have additional
resistor and capacitor placements for loading.
NOTE: Operational amplifiers are sensitive to output capacitance
and may oscillate. In the event of oscillation, reduce output
capacitance by using shorter cables, or add a resistor in series
with the output.
Bill of Materials
DEVICE #
C2, C4
C3, C6
C5, C7
C1, C8-C12
D1
U1
R1, R2, R5-R8, R14, R20, R23, R24,
R3, R20-R22
R4, R10, R17, R18
R10, R12, R13, R16
DESCRIPTION
CAP, SMD, 1210, 1µF, 50V, 10%, X7R, ROHS
CAP, SMD, 0805, 0.1µF, 50V, 10%, X7R, ROHS
CAP, SMD, 0603, 0.01µF, 50V, 10%, X7R, ROHS
CAP, SMD, 0603, DNP-PLACE HOLDER, ROHS
DIODE-RECTIFIER, SMD, SOD-123, 2P, 40V, 0.5A, ROHS
ISL70219ASEH, DUAL OP AMP, 10Ld. FLATPACK
RESISTOR, SMD, 0603, 0.1%, MF, DNP PLACEHOLDER
RES, SMD, 0603, 0Ω, 1/10W,TF, ROHS
RES, SMD, 0603, 10k, 1/10W, 1%, TF, ROHS
RES, SMD, 0603, 100k, 1/10W, 1%, TF, ROHS
User selectable resistors - not populated
0Ω user selectable resistors
Gain resistors
Gain resistors
COMMENTS
Power Supply Decoupling
Power Supply Decoupling
Power Supply Decoupling
User selectable capacitors - not populated
Reverse Power Protection
UG007 Rev.0.00
October 31, 2014
Page 3 of 9
R11
R14
100
1
D1
C2
1UF
C3
0.1UF
C5
0.01UF
C4
3
2
1UF
C6
0.1UF
C7
0.01UF
C3 AND C5 CLOSE TO PART
100
R1
DNP
0
DNP
R5
10K
100K
C1
OPEN
R15
100K
R18
10K
DNP
R19
R20
0
C8
OPEN
U1
1
10
9
8
C10
OPEN
OUTA
-INA
+INA
NC
V-
V+
OUTB
-INB
+INB
LID
J2
R22
0
C9
10K
OPEN
JP1
DNP
C12
R23
R16
OPEN
DNP
C11
R24
IN- A
OPEN
UG007 Rev.0.00
October 31, 2014
J1
R3
R4
ISL70219ASEH
J5
V-
J6
J7
V+
J8
J9
VREF
J10
R21
R10
0
J11
OUT A
2
R6
R2
10K
DNP
J12
OUT B
IN+ A
3
4
5
7
6
ISL70219ASEHVF
J3
IN- B
R7
DNP
VREF
J4
R8
R9
DNP
DNP
100K
100K
DNP
R12
R13
R17
DRAWN BY:
IN+ B
TIM KLEMANN
DATE:
10/14/2014
DATE:
ENGINEER:
D
Kiran Bernard
TITLE:
RELEASED BY:
ISL70219ASEH
UPDATED BY:
DATE:
EVALUATION BOAR
FIGURE 6. ISL70219ASEHEV1Z SCHEMATIC DIAGRAM
Page 4 of 9
ISL70219ASEH
ISL70219ASEH Board Layout
FIGURE 7. TOP VIEW
UG007 Rev.0.00
October 31, 2014
Page 5 of 9
电子竞赛
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
