LTC4150
Coulomb Counter/
Battery Gas Gauge
FEATURES
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■
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■
■
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■
DESCRIPTIO
Indicates Charge Quantity and Polarity
±50mV
Sense Voltage Range
Precision Timer Capacitor or Crystal Not Required
2.7V to 8.5V Operation
High Side Sense
32.55Hz/V Charge Count Frequency
1.5µA Shutdown Current
10-Pin MSOP Package
APPLICATIO S
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The LTC
®
4150 measures battery depletion and charging in
handheld PC and portable product applications. The de-
vice monitors current through an external sense resistor
between the battery’s positive terminal and the battery’s
load or charger. A voltage-to-frequency converter trans-
forms the current sense voltage into a series of output
pulses at the interrupt pin. These pulses correspond to a
fixed quantity of charge flowing into or out of the battery.
The part also indicates charge polarity as the battery is
depleted or charged.
The LTC4150 is intended for 1-cell or 2-cell Li-Ion and
3-cell to 6-cell NiCd or NiMH applications.
, LTC and LT are registered trademarks of Linear Technology Corporation.
Battery Chargers
Palmtop Computers and PDAs
Cellular Telephones and Wireless Modems
TYPICAL APPLICATIO
Integral Nonlinearity, % of Full Scale
R
SENSE
CHARGER
LOAD
4.7µF
R
L
SENSE
–
SENSE
+
V
DD
C
F+
INT
4.7µF
C
F–
LTC4150
CLR
POL
GND
SHDN
4150 TA01a
0.5
0.4
0.3
R
L
+
ERROR (% FULL SCALE)
0.2
0.1
0
–0.1
–0.2
–0.3
–0.4
–0.5
–50
–25
0
25
CURRENT SENSE VOLTAGE (mV)
50
CHG
DISCHG
µP
U
4150 TA01b
U
U
4150fa
1
LTC4150
ABSOLUTE
(Note 1)
AXI U RATI GS
PACKAGE/ORDER I FOR ATIO
TOP VIEW
SENSE
+
SENSE
–
C
F+
C
F–
SHDN
1
2
3
4
5
10
9
8
7
6
INT
CLR
V
DD
GND
POL
Supply Voltage (V
DD
) ...................................– 0.3V to 9V
Input Voltage Range
Digital Inputs (CLR, SHDN) ....... – 0.3V to (V
DD
+ 0.3)
SENSE
–
, SENSE
+
, C
F –
, C
F + ........
– 0.3V to (V
DD
+ 0.3)
Output Voltage Range
Digital Outputs (INT, POL) .......................– 0.3V to 9V
Operating Temperature Range
LTC4150CMS .......................................... 0°C to 70°C
LTC4150IMS ..................................... –40°C TO 85°C
Storage Temperature Range ................. – 65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
ORDER PART
NUMBER
LTC4150CMS
LTC4150IMS
MS PART MARKING
LTQW
MS PACKAGE
10-LEAD PLASTIC MSOP
T
JMAX
= 125°C,
θ
JA
= 160°C/W
Consult LTC Marketing for parts specified with wider operating temperature ranges.
The
●
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
DD
= 2.7V and 8.5V unless otherwise noted.
SYMBOL
V
IL
V
IH
V
OL
I
LEAK
V
OS
PARAMETER
Digital Input Low Voltage, CLR, SHDN
Digital Input High Voltage, CLR, SHDN
Digital Output Low Voltage, INT, POL
Digital Output Leakage Current, INT, POL
Differential Offset Voltage (Note 4)
I
OL
= 1.6mA, V
DD
= 2.7V
V
INT
= V
POL
= 8.5V
V
DD
= 4.0V
●
ELECTRICAL CHARACTERISTICS
CONDITIONS
●
●
●
●
MIN
1.9
TYP
MAX
0.7
0.5
UNITS
V
V
V
µA
µV
µV
µV
µV
µV
µV
V
V
kΩ
V
µA
µA
µA
µA
Hz/V
Hz/V
%/V
%/ ºC
%
%
µs
µs
4150fa
0.01
1
±100
±150
±100
±150
±150
±200
V
DD
= 8.0V
●
V
DD
= 2.7V to 8.5V
●
V
SENSE(CM)
V
SENSE
R
IDR
V
UVLO
I
DD
I
DD(SD)
Sense Voltage Common Mode Input Range
Sense Voltage Differential Input Range
Average Differential Input Resistance,
Across SENSE
+
and SENSE
–
Undervoltage Lockout Threshold
Supply Current, Operating
Supply Current, Shutdown
SENSE
+
– SENSE
–
V
DD
= 4.1V (Note 3)
V
DD
Rising
V
DD
= 8.5V
V
DD
= 2.7V
V
DD
= 8.5V
V
DD
= 2.7V
V
SENSE
= 50mV to – 50mV,
2.7V
≤
V
DD
≤
8.5V
2.7V
≤
V
DD
≤
8.5V
(Note 2)
●
●
V
DD
– 0.06
– 0.05
155
270
2.5
115
80
V
DD
+ 0.06
0.05
390
2.7
140
100
10
1.5
●
●
●
●
●
Power Supply Current
AC Characteristics
G
VF
∆G
VF
(V
DD
)
INL
t
CLR
t
INT
Voltage to Frequency Gain
Gain Variation with Supply
Integral Nonlinearity
●
●
●
32.0
31.8
0
– 0.03
– 0.4
– 0.5
20
32.55
33.1
33.3
0.5
0.03
0.4
0.5
∆G
VF
(TEMP) Gain Variation with Temperature
CLR Pulse Width to Reset INT,
INT and CLR Not Connected
INT Low Time, INT Connected to CLR
Figure 2
Figure 3, C
L
= 15pF
●
1
2
U
W
U
U
W W
W
LTC4150
ELECTRICAL CHARACTERISTICS
Note 1:
Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2:
Guaranteed by design and not tested in production.
Note 3:
Measured at least 20ms after power on.
Note 4:
Tested in feedback loop to SENSE
+
and SENSE
–
.
otherwise noted.)
TYPICAL PERFOR A CE CHARACTERISTICS
Voltage to Frequency Gain
vs Supply Voltage
+1.00
+0.75
+1.00
+0.75
G
VF
ERROR (% OF TYPICAL)
+0.50
+0.25
V
SENSE
= 25mV
0
–0.25
–0.50
–0.75
–1.00
2
3
4
5
6
V
DD
(V)
7
8
9
4150 G01
G
VF
ERROR (% OF TYPICAL)
I
DD
(µA)
125
V
SENSE
= 50mV
Shutdown I
DD
vs V
DD
6
5
4
V
OL
(mV)
3
2
1
0
2
3
4
5
6
V
DD
(V)
4150 G04
200
150
100
50
0
INT PIN
UVLO (V)
I
DD
(µA)
7
U W
8
9
(Specifications are at T
A
= 25°C, unless
Voltage to Frequency Gain
vs Temperature
V
SENSE
= 50mV
140
Operating I
DD
vs V
DD
+0.50
+0.25
0
–0.25
–0.50
–0.75
–1.00
-50
V
DD
= 2.7V
V
DD
= 8.5V
120
100
80
60
-25
0
25
50
75
TEMPERATURE (°C)
100
2
3
4
5
6
7
V
DD
(V)
8
9
10
4150 G02
4150 G03
Digital Output Low Voltage vs V
DD
400
350
300
250
POL PIN
I
OL
= 1.6mA
2.60
2.59
2.58
2.57
2.56
2.55
2.54
2.53
2
3
4
5
6
V
DD
(V)
7
8
9
4150 G05
Undervoltage Lockout Threshold
vs Temperature
RISING EDGE
10
2.52
-50
-25
0
25
50
75
TEMPERATURE (°C)
100
125
4150 G06
4150fa
3
LTC4150
PI FU CTIO S
SENSE
+
(Pin 1):
Positive Sense Input. This is the
noninverting current sense input. Connect SENSE
+
to the
load and charger side of the sense resistor. Full-scale
current sense input is 50mV. SENSE
+
must be within
60mV of V
DD
for proper operation.
SENSE
–
(Pin 2):
Negative Sense Input. This is the inverting
current sense input. Connect SENSE
–
to the positive
battery terminal side of the sense resistor. Full-scale
current sense input is 50mV. SENSE
–
must be within
60mV of V
DD
for proper operation.
C
F+
(Pin 3):
Filter Capacitor Positive Input. A capacitor
connected between C
F+
and C
F–
filters and averages noise
and fast battery current variations. A 4.7µF value is recom-
mended. If filtering is not desired, leave C
F+
and C
F–
unconnected.
C
F–
(Pin 4):
Filter Capacitor Negative Input. A capacitor
connected between C
F+
and C
F–
filters and averages noise
and fast battery current variations. A 4.7µF value is recom-
mended. If filtering is not desired, leave C
F+
and C
F–
unconnected.
SHDN (Pin 5):
Shutdown Digital Input. When asserted
low, SHDN forces the LTC4150 into its low current con-
sumption power-down mode and resets the part. In appli-
cations with logic supply V
CC
> V
DD
, a resistive divider
must be used between SHDN and the logic which drives it.
See the Applications Information section.
POL (Pin 6):
Battery Current Polarity Open-Drain Output.
POL indicates the most recent battery current polarity
when INT is high. A low state indicates the current is
flowing out of the battery while high impedance means the
current is going into the battery. POL latches its state when
INT is asserted low. POL is an open-drain output and can
be pulled up to any logic supply up to 9V. In shutdown,
POL is high impedance.
GND (Pin 7):
Ground. Connect directly to the negative
battery terminal.
V
DD
(Pin 8):
Positive Power Supply. Connect to the load
and charger side of the sense resistor. SENSE
+
also
connects to V
DD
. V
DD
operating range is 2.7V to 8.5V.
Bypass V
DD
with 4.7µF capacitor.
CLR (Pin 9):
Clear Interrupt Digital Input. When asserted
low for more than 20µs, CLR resets INT high. Charge
counting is
unaffected.
INT may be directly connected to
CLR. In this case the LTC4150 will capture each assertion
of INT and wait at least 1µs before resetting it. This ensures
that INT pulses low for at least 1µs but gives automatic INT
reset. In applications with a logic supply V
CC
> V
DD
, a
resistive divider must be used between INT and CLR. See
the Applications Information section.
INT (Pin 10):
Charge Count Interrupt Open-Drain Output.
INT latches low every 1/(V
SENSE
• G
VF
) seconds and is
reset by a low pulse at CLR. INT is an open-drain output
and can be pulled up to any logic supply of up to 9V. In
shutdown INT is high impedance.
4
U
U
U
4150fa
LTC4150
BLOCK DIAGRA
CHARGER
LOAD
V
DD
S3
100pF
2k
S1
200k
C
F+
200k
AMPLIFIER
SENSE
+
R
SENSE
C
F
C
F–
2k
SENSE
–
200k
I
BAT
GND
4150 F01
TI I G DIAGRA S
CLR
50%
50%
t
CLR
INT
50%
50%
INT
t
INT
4150 F02
4150 F03
Figure 2. CLR Pulse Width to Reset INT,
CLR and INT Not Connected
W
W
REFHI
1.7V
INT
+
–
CONTROL
LOGIC
OFLOW/
UFLOW
COUNTER
S
R
Q
–
+
CLR
UP/DN
CHARGE
POL
DISCHARGE
+
–
POLARITY
DETECTION
S2
REFLO
0.95V
SHDN
Figure 1. Block Diagram
UW
Figure 3. INT Minimum Pulse Width, CLR and INT Connected
4150fa
5
NXP MCU
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