USER’S MANUAL
ISL28210SOICEVAL1Z
Evaluation Board User’s Guide
AN1594
Rev 0.00
Oct 1, 2010
Introduction
The ISL28210SOICEVAL1Z evaluation board is designed
to evaluate the performance of the ISL28210 Precision
Low Noise JFET Operational Amplifier. The ISL28210 is a
dual JFET amplifier that features low noise, high slew
rate, low input bias current and low offset voltage. With a
wide operating range from 9V to 40V, in combination with
its high precision, low noise and high speed operation,
the ISL28210 is ideal for precision medical and
instrumentation, sensor conditioning, power supply
control and photodiode amplifiers.
Power Supplies (Figure 1)
External power connections are made through the V+,
V-, VREF, and GND connections on the evaluation board.
The circuit can operate from a single supply or from dual
supplies. For single supply operation, the V- and GND
pins are tied together to the negative or ground
reference of the power supply. For split supplies, V+ and
V- terminals connect to their respective supply terminals.
De-coupling capacitors C2 and C4 provide low-frequency
power-supply filtering, while additional capacitors, C3
and C5, which are connected close to the part, filter out
high frequency noise. Anti-reverse diode D1 (optional)
protects the circuit in the momentary case of accidentally
reversing the power supplies to the evaluation board.
The VREF pin can be connected to ground to establish a
ground referenced input for split supply operation, or can
be externally set to any reference level for single supply
operation.
J11
J6
J13
J14
V-
3
2
J8
V+
VREF
J12
Reference Documents
• ISL28210 Data Sheet,
FN6639
Evaluation Board Key Features
• Single Supply Operation: +9V to +40V
• Dual Supply Operation: ±4.5V to ±20V
• Singled-Ended or Differential Input Operation
• External VREF input
• Banana Jack Connectors for Power Supply and VREF
Inputs
• BNC Connectors for Op Amp Input and Output
Terminals
• Convenient PCB Pads for Op Amp Input/Output
Impedance Loading
2 1
1
1
1 R31 2 1
0
1
R16
0
1
C2
3
C4
1µF
1µF
D1
CLOSE TO DUT
C3
0.01µF
C5
0.01µF
FIGURE 1. POWER SUPPLY CIRCUIT
R13/R23
100kΩ
R11/R24
10kΩ
R14/R21
PRECISION
SENSOR
10kΩ
R18/R19
100kΩ
INA+ 3
INB+ 5
INA- 2
INB- 6
8
-
+4.5V
TO +20V
1/7
V
OUT
V+
ISL28210
V-
4
+
GAIN = -10V/V
-4.5V TO -20V
V
REF
FIGURE 2. PRECISION AMPLIFIER WITH G = -10V/V
AN1594 Rev 0.00
Oct 1, 2010
Page 1 of 5
1
3
2
2
1
ISL28210SOICEVAL1Z
Amplifier Configuration (Figure 3)
The schematic of the op amp input stage with the
components supplied is shown in Figure 3, with a closed
loop gain of 10V/V. The differential amplifier gain is
expressed in Equation 1:
V
OUT
=
V
IN+
–
V
IN-
R
F
R
IN
+
V
REF
The output (Figure 4) also has additional resistor and
capacitor placements for filtering and loading.
NOTE: Operational amplifiers are sensitive to output
capacitance and may oscillate. In the event of oscillation,
reduce output capacitance by using shorter cables, or
add a resistor in series with the output.
C1
R4
R1
DNP
R5
0
R11
DNP
10k
OPEN
R13
100k
FROM V
OUTA
(EQ. 1)
For single-ended input with an inverting gain G = -10V/V,
the IN+ input is grounded and the signal is supplied to the
IN- input. VREF can be connected to a reference voltage
between the V+ and V- supply rails. For non-inverting
operation with G = 11V/V, the IN- input is grounded and
the signal is supplied to the IN+ input. The non-inverting
gain is strongly dependent on any resistance from IN- to
GND. For good gain accuracy, a 0 resistor should be
installed on the empty R5 pad.
IN-A J1
TO INA -
IN+A J2
R14
R2
DNP
10k
R15
DNP
R18
100k
VREF
TO INA +
User-selectable Options
(Figures 3 and 4)
Component pads are included to enable a variety of
user-selectable circuits to be added to the amplifier
inputs, the VREF input, outputs and the amplifier
feedback loops.
A voltage divider (Figure 3, R18 and R15) can be added
to establish a power supply-tracking common mode
reference using the VREF input. The inverting and non-
inverting inputs have additional resistor placements for
adding input attenuation, or to establish input DC offsets
through the VREF pin.
V
OUT_A
FIGURE 3. INPUT STAGE
R26
OPEN
R28
DNP
0
C6
OPEN
C8
J15
OUT A
FIGURE 4. OUTPUT STAGE
TABLE 1. ISL28210SOICEVAL1Z COMPONENTS PARTS LIST
DEVICE #
C2, C4
C3, C5
C1, C6, C7, C8, C9, C10
D1
R11, R14, R21, R24
R13, R23
DESCRIPTION
CAP, SMD, 1206, 1µF, 50V, 10%, X7R, ROHS
CAP, SMD, 0603, 0.01µF, 50V, 10%, X7R, ROHS
CAP, SMD, 0603, DNP-PLACE HOLDER, ROHS
40V DUAL SERIES SCHOTTKY BARRIER DIODE
RESISTOR, SMD, 0603, 10kΩ, 1%, 1/16W, ROHS
RESISTOR, SMD, 0603, 100kΩ, 1%, 1/16W, ROHS
COMMENTS
Power Supply Decoupling
Power Supply Decoupling
User selectable capacitors - not populated
Reverse Power Protection
Gain Setting Resistor
Gain Setting Feedback Resistor
User selectable resistors - not populated
R1-R3, R5-R8, R10, R12, RESISTOR, SMD, 0603, DNP-PLACE HOLDER, ROHS
R15, R17, R20, R22, R28-
R30, R32, R34-R36
U1 (ISL28210FBZ)
ISL28210FBZ, IC PRECISION LOW NOSIE JFET OP AMP,
SOIC, ROHS
AN1594 Rev 0.00
Oct 1, 2010
Page 2 of 5
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