DATASHEET
ISL80111, ISL80112, ISL80113
Ultra Low Dropout 1A, 2A, 3A Low Input Voltage NMOS LDOs
The
ISL80111, ISL80112,
and
ISL80113
are ultra low dropout
LDOs providing the optimum balance between performance, size
and power consumption in size constrained designs for data
communication, computing, storage and medical applications.
These LDOs are specified for 1A, 2A and 3A of output current and
are optimized for low voltage conversions. Operating with a V
IN
of
1V to 3.6V and with a legacy 2.9V to 5.5V on the BIAS, the V
OUT
is
adjustable from 0.8V to 3.3V. With a V
IN
PSRR greater than 40dB
at 100kHz makes these LDOs an ideal choice in noise sensitive
applications. The guaranteed ±1.6% V
OUT
accuracy overall
conditions lend these parts to supplying an accurate voltage to
the latest low voltage digital ICs.
An enable input allows the part to be placed into a low quiescent
current shutdown mode. A submicron CMOS process is utilized for
this product family to deliver best-in-class analog performance
and overall value for applications in need of input voltage
conversions typically below 2.5V. It also has the superior load
transient regulation unique to a NMOS power stage. These LDOs
consume significantly lower quiescent current as a function of
load compared to bipolar LDOs.
FN7841
Rev 3.00
September 30, 2016
Features
• Ultra low dropout: 75mV at 3A, (typical)
• Excellent V
IN
PSRR: 70dB at 1kHz (typical)
• ±1.6% guaranteed V
OUT
accuracy for -40ºC < T
J
< +125ºC
• Very fast load transient response
• Extensive protection and reporting features
• V
IN
range: 1V to 3.6V, V
OUT
range: 0.8V to 3.3V
• Small 10 Ld 3x3 DFN package
Applications
• Noise-sensitive instrumentation and medical systems
• Data acquisition and data communication systems
• Storage, telecommunications and server equipment
• Low voltage DSP, FPGA and ASIC core power supplies
• Post-regulation of switched mode power supplies
Related Literature
•
UG009,
“ISL8011xEVAL1Z Evaluation Board User Guide”
DROPOUT VOLTAGE, BIAS = 5V (mV)
100
90
80
70
60
50
40
30
20
10
0
-40
25
85
TEMPERATURE (
°
C)
125
1A
2A
3A
ISL80111, ISL80112, ISL80113
1.2V ±5%
VIN
C
IN
10µF
C
BIAS
1µF
VIN
10 VIN
4 VBIAS
9
VOUT 1
VOUT 2
6
C
OUT
10µF
1.0V
VOUT
3.3V ±10%
VBIAS
PG
PGOOD
R
3
1.0kΩ
R
4
1.0kΩ
7 ENABLE
ADJ 3
GND
5
OPEN-DRAIN COMPATIBLE
EN
FIGURE 1. TYPICAL APPLICATION SCHEMATIC
FIGURE 2. DROPOUT VOLTAGE OVER-TEMP AND I
OUT
100
80
PSRR (dB)
I
OUT
= 1A
60
I
OUT
= 2A
40
20
0
BIAS = 5V
V
IN
= 3.3V
V
OUT
= 2.5V
C
OUT
= 10µF
100
1k
I
OUT
= 3A
I
OUT
= 0A
V
ADJ
+25°C NORMALIZED
1.015
1.010
1.005
1.000
0.995
0.990
0.985
-40
0
25
85
TEMPERATURE (°C)
125
10k
FREQUENCY (Hz)
100k
1M
FIGURE 3. V
IN
PSRR vs LOAD CURRENT (ISL80113)
FIGURE 4. V
ADJ
vs TEMPERATURE
FN7841 Rev 3.00
September 30, 2016
Page 1 of 16
ISL80111, ISL80112, ISL80113
Block Diagram
VIN
VBIAS
BIAS
UVLO
VIN
VIN
UVLO
DRIVER
EN
IL/10,000
THERMAL
SHUTDOWN
EN
EN
-
+
ENABLE
M7
500mV
+
-
425mV
+
-
GND
-
+
ADJ
EN
PG
M
2
CURRENT
LIMIT
M3
M1 POWER NMOS
IL
VOUT
R7
FIGURE 5. BLOCK DIAGRAM
Pin Configuration
ISL80111, ISL80112, ISL80113
(10 LD 3X3 DFN)
TOP VIEW
VOUT
VOUT
ADJ
VBIAS
GND
1
2
3
4
5
EPAD
(GND)
10 VIN
9 VIN
8 NC
7 ENABLE
6 PG
Pin Descriptions
PIN
NUMBER
1, 2
3
4
5
6
PIN NAME
VOUT
ADJ
VBIAS
GND
PG
DESCRIPTION
Output voltage pin. Range 0.8V to 3.3V
ADJ pin for externally setting V
OUT
.
Bias voltage pin for internal control circuits.
Range 2.9V to 5.5V
Ground pin
V
OUT
in regulation signal. Logic low defines
when V
OUT
is not in regulation. Range 0V to
BIAS
V
IN
independent chip enable. TTL and CMOS
compatible. Range 0V to V
BIAS.
V
EN
must
always be less than or equal to the voltage
applied to VBIAS. When this pin is not used, it
must be tied to VBIAS.
No Connect
Input supply pins. Range 1.0V to 3.6V
EPAD at ground potential. It is recommended
to solder the EPAD to the ground plane.
7
ENABLE
8
9, 10
NC
VIN
EPAD
FN7841 Rev 3.00
September 30, 2016
Page 2 of 16
ISL80111, ISL80112, ISL80113
Ordering Information
PART NUMBER
(Notes
1, 2, 3)
ISL80111IRAJZ
ISL80112IRAJZ
ISL80113IRAJZ
ISL80111EVAL1Z
ISL80112EVAL1Z
ISL80113EVAL1Z
NOTES:
1. Add “-T” suffix for 6k unit or “-T7A” suffix for 250 unit tape and reel options. Please refer to
TB347
for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information pages for
ISL80111, ISL80112,
and
ISL80113.
For more information on MSL
please see Tech Brief
TB363.
1ADJ
2ADJ
3ADJ
ISL80111 Evaluation Board
ISL80112 Evaluation Board
ISL80113 Evaluation Board
PART
MARKING
V
OUT
(V)
ADJ
ADJ
ADJ
TEMP RANGE
(°C)
-40 to +125
-40 to +125
-40 to +125
PACKAGE
(RoHS COMPLIANT)
10 Ld 3x3 DFN
10 Ld 3x3 DFN
10 Ld 3x3 DFN
PKG
DWG. #
L10.3x3
L10.3x3
L10.3x3
TABLE 1. KEY DIFFERENCE BETWEEN FAMILY OF PARTS
PART NUMBER
ISL80111
ISL80112
ISL80113
I
OUT
MAXIMUM
1A
2A
3A
FN7841 Rev 3.00
September 30, 2016
Page 3 of 16
ISL80111, ISL80112, ISL80113
Absolute Maximum Ratings
(Note
4)
VIN Relative to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to +6V
VOUT Relative to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to +4V
PG, ENABLE, ADJ, Relative to GND (Note
5)
. . . . . . . . . . . . . . . . -0.3 to +6V
VBIAS Relative to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +6V
PG Rated Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10mA
ESD Rating
Human Body Model (Tested per JESD22-A114E) . . . . . . . . . . . . . . 4000V
Machine Model (Tested per JESD22-115-A) . . . . . . . . . . . . . . . . . . . 300V
Charged Device Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2000V
Latch-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100mA
Thermal Information
Thermal Resistance (Typical)
JA
(°C/W)
JC
(°C/W)
10 Ld 3x3 DFN Package (Notes
6, 7).
. . . .
48
4
Storage Temperature Range. . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Pb-free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see
TB493
Recommended Operating Conditions
(Notes
4)
Junction Temperature Range . . . . . . . . . . . . . . . . . . . . . . .-40°C to +125°C
VIN Relative to GND (ISL80113) (Note
8)
. . . . . . . . . V
OUT
+ 0.30V to 3.6V
VIN Relative to GND (ISL80112) (Note
8)
. . . . . . . . . V
OUT
+ 0.25V to 3.6V
VIN Relative to GND (ISL80111) (Note
8)
. . . . . . . . . V
OUT
+ 0.20V to 3.6V
Nominal V
OUT
Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 800mV to 3.3V
PG, ENABLE, ADJ, SS Relative to GND . . . . . . . . . . . . . . . . . . . . .0V to 5.5V
VBIAS Relative to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0V to 5.5V
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
4. Absolute maximum ratings define limits of safe operation. Extended operation at these conditions may compromise reliability. Exceeding these limits
will result in damage. Recommended operating conditions define limits where specifications are guaranteed.
5. Absolute maximum voltage rating is defined as the voltage applied for a lifetime average duty cycle above 6V of 1%.
6.
JA
is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech
Brief
TB379.
7. For
JC
, the “case temp” location is the center of the exposed metal pad on the package underside.
8. Minimum operating voltage applied to V
IN
is 1V if V
OUT
+ V
DO
< 1V
Unless otherwise specified, V
IN
= 3V, V
BIAS
= 5.5V, V
OUT
= 0.5V, T
J
= +25°C, I
L
= 0mA. Applications must follow
thermal guidelines of the package to determine worst-case junction temperature. Please refer to
“Power Dissipation” on page 13
and Tech Brief
TB379.
Boldface limits apply across junction temperature (T
J
) range, -40°C to +125°C. Pulse load techniques used by ATE to ensure T
J
= T
A
where datasheet
limits are defined.
PARAMETER
DC CHARACTERISTICS
V
BIAS
UVLO
UVLO_BIAS_r
UVLO_BIAS_f
V
BIAS
UVLO Hysteresis
DC ADJ Pin Voltage
Accuracy
DC Input Line Regulation
DC Bias Line Regulation
DC Output Load Regulation
Feedback Input Current
V
IN
Quiescent Current
V
IN
Quiescent Current
I
Q
(V
IN)
I
Q
(V
IN)
UVLO
B_HYS
V
ADJ
1.0V
V
IN
3.6V, I
LOAD
½
0A, 2.9V
V
BIAS
5.5V,
V
OUT
= V
ADJ
494
-0.18
-0.28
-0.40
V
BIAS
Rising
V
BIAS
Falling
1.55
2.3
2.1
0.2
502
0.02
0.06
-0.04
10
8
10.6
510
0.18
0.28
0.40
80
10
2.9
2.8
V
V
V
mV
%
%
%
nA
mA
mA
SYMBOL
TEST CONDITIONS
MIN
(Note
9)
TYP
MAX
(Note
9)
UNIT
Electrical Specifications
(V
OUT
low line-V
OUT
high 2.9V
V
IN
3.6V, V
OUT
= 2.5V
line)/V
OUT
low line
(V
OUT
low line-V
OUT
high 4.5V<V
BIAS
<5.5V, V
OUT
= 2.5V
line)/V
OUT
low line
(V
OUT
no load-V
OUT
high 0A
I
LOAD
Full
Load, V
OUT
= 2.5V
load)/V
OUT
no load
V
ADJ
= 0.5V
V
OUT
= 2.5V
V
OUT
= 3.3V, V
IN
= 3.6V, V
BIAS
= 5V
FN7841 Rev 3.00
September 30, 2016
Page 4 of 16
ISL80111, ISL80112, ISL80113
Unless otherwise specified, V
IN
= 3V, V
BIAS
= 5.5V, V
OUT
= 0.5V, T
J
= +25°C, I
L
= 0mA. Applications must follow
thermal guidelines of the package to determine worst-case junction temperature. Please refer to
“Power Dissipation” on page 13
and Tech Brief
TB379.
Boldface limits apply across junction temperature (T
J
) range, -40°C to +125°C. Pulse load techniques used by ATE to ensure T
J
= T
A
where datasheet
limits are defined. (Continued)
PARAMETER
V
IN
Quiescent Current
V
BIAS
Quiescent Current
Ground Pin Current in
Shutdown
V
IN
Dropout Voltage
(Note
10)
SYMBOL
I
Q
(V
IN)
I
Q
(V
BIAS)
I
SHDN
V
DO(VIN)
TEST CONDITIONS
V
OUT
= 1.0V, V
IN
= 1.4V, V
BIAS
= 3.3V
0
I
L
3A,
4.5V
V
BIAS
5.5V
(ISL80113)
ENABLE Pin = 0.2V, TJ = +125°C
I
LOAD
= 1A, V
OUT
= 2.5V, V
BIAS
= 4.5V (ISL80111)
I
LOAD
= 2A, V
OUT
= 2.5V, V
BIAS
= 4.5V (ISL80112)
I
LOAD
= 3A, V
OUT
= 2.5V, V
BIAS
= 4.5V (ISL80113)
V
BIAS
Dropout Voltage
(Note
10)
V
DO(BIAS)
I
LOAD
= 1A, V
OUT
= 2.5V (ISL80111)
I
LOAD
= 2A, V
OUT
= 2.5V (ISL80112)
I
LOAD
= 3A, V
OUT
= 2.5V (ISL80113)
OVERCURRENT PROTECTION
Output Short Circuit Current
(3A Version)
Output Short Circuit Current
(2A Version)
Output Short Circuit Current
(1A Version)
OVER-TEMPERATURE PROTECTION
Thermal Shutdown
Temperature
Thermal Shutdown
Hysteresis
AC CHARACTERISTICS
Input Supply Ripple
Rejection
Output Noise Voltage
Spectral Noise Density
PSRR(V
IN
)
PSRR(V
BIAS
)
e
N(RMS)
e
N
f = 120Hz, I
LOAD
= 1A
f = 120Hz, I
LOAD
= 1A
BW = 100Hz
f
100kHz, V
BIAS
= 2.9V, V
IN
= 1.6V,
V
OUT
= 1.2V, I
LOAD
= 3A
I
LOAD
= 3A, f = 10Hz, V
BIAS
= 2.9V, V
IN
= 1.6V,
V
OUT
= 1.2V
I
LOAD
= 3A, f = 100Hz, V
BIAS
= 2.9V, V
IN
= 1.6V,
V
OUT
= 1.2V
DEVICE START-UP CHARACTERISTICS
EN Start-up Time
BIAS Start-up Time
ENABLE PIN CHARACTERISTICS
Turn-on Threshold (Rising)
Hysteresis
PG PIN CHARACTERISTICS
PG Flag Falling Threshold
PG Flag Hysteresis
PG Flag Low Voltage
PG
TH
PGHYS
V
BIAS
= 5.5V
V
BIAS
= 5.5V
I
SINK
= 500µA
71
82
9.3
90
130
93
%V
OUT
%V
OUT
mV
V
IN
= 3.6V, V
BIAS
= 5.5V
V
IN
= 3.6V, V
BIAS
= 5.5V
400
60
680
260
850
330
mV
mV
t
EN
t
BIAS
C
OUT
= 10µF, I
LOAD
= 1A
C
OUT
= 10µF, EN = BIAS
50
100
µs
µs
80
60
38
3
1
dB
dB
µV
RMS
µV/Hz
µV
/
Hz
TSD
TSDn
160
20
°C
°C
ISC
V
OUT
= 0.2V (ISL80113)
V
OUT
= 0.2V (ISL80112)
V
OUT
= 0.2V (ISL80111)
5.2
3.2
2.2
A
A
A
MIN
(Note
9)
TYP
3.5
2.9
3
27
53
75
1.1
1.2
1.3
4.6
20
90
115
140
1.3
1.4
1.5
MAX
(Note
9)
UNIT
mA
mA
µA
mV
mV
mV
V
V
V
Electrical Specifications
FN7841 Rev 3.00
September 30, 2016
Page 5 of 16
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