19-1595; Rev 1; 12/99
MAX1292 Evaluation Kit
General Description
The MAX1292 evaluation kit (EV kit) is assembled with a
MAX1292 and the basic components necessary to eval-
uate this 12-bit analog-to-digital converter (ADC).
Connectors for power supplies, analog inputs, and digital
signals simplify connections to the device. A 40-pin
header allows the user to connect a logic analyzer using
a ribbon cable or conventional minihooks. BNC connec-
tors with 50Ω terminations provide easy connection
between function generators and the analog inputs.
The board layout is designed to yield 12-bit accuracy
with low noise when sampling at the maximum rate of
400ksps.
The MAX1292 EV kit can also be used to evaluate the
MAX1293. Request a free sample of the MAX1293BCEG
when ordering the MAX1292 EV kit.
o
12-Bit Analog-to-Digital Conversion
o
Four Input Channels
o
Byte-Wide Digital Interface
o
Internal Track/Hold
o
400kHz Sampling Rate
o
Internal 2.5V Reference
o
Internal Clock
o
Low-Power Standby Mode
o
Fully Assembled and Tested Surface-Mount Board
Features
Evaluates: MAX1292/MAX1293
Ordering Information
Component List
DESIGNATION QTY
C1, C3, C8–C12
C2, C4, C5
C6, C7
7
3
2
DESCRIPTION
0.1µF ceramic capacitors
4.7µF, 10V tantalum capacitors
AVX TAJB475M010R
0.01µF ceramic capacitors
BNC connectors
40-pin header
2-pin jumpers
47kΩ, 9-resistor, 10-pin SIP
51Ω ±5% resistor
MAX1292BCEG (24-pin QSOP)
Shunts
MAX1292 PC board
MAX1290/MAX1292 data sheet
PART
MAX1292EVKIT
TEMP RANGE
0°C to +70°C
IC PACKAGE
24 QSOP
Quick Start
The MAX1292 EV kit comes fully tested and assembled.
The following equipment is required:
• A +5V linear power supply. Switching supplies
induces excess noise on the power input.
• A low-distortion function generator
• A logic analyzer
A logic analyzer or other digital system is needed to
provide the clock and control signals and to capture
the MAX1292 conversion results. Connect the logic
analyzer using a 40-pin ribbon cable, or a combination
of BNC cables, ribbon cable, and miniclips. Refer to the
MAX1292 data sheet for detailed information on timing
requirements.
The analog input signals must be delivered by a low-
distortion source to achieve full 12-bit accuracy. All
analog channels connect to BNC connectors terminated
with 51Ω resistors. For low-noise performance, maintain
separate analog and digital supplies and grounds to
the board. The grounds are connected in a star config-
uration centered on the ground plane of the board.
Refer to the MAX1292 data sheet for a detailed discus-
sion of signal grounds.
Many of the digital and analog signals on the evaluation
kit have 51Ω termination resistors matching typical gen-
erator impedance. These should be removed if high-
impedance sources are used.
CH0–CH3, COM,
CS,
CLK,
WR,
11
RD, INT,
HBEN
J1
JU1, JU2
R1
R2, R4–R12
U1
None
None
None
1
2
1
10
1
2
1
1
________________________________________________________________
Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
MAX1292 Evaluation Kit
Evaluates: MAX1292/MAX1293
Connections and Setup
Connect all supplies and signal lines before turning on
any supply or signal source.
1) Connect the +5V power supply to the VDD and
VLOGIC pads. Connect the ground side to the
AGND and DGND pads. For best low-noise perfor-
mance, connect separate supplies to VDD/AGND
and VLOGIC/DGND.
2) Make sure there is no shunt installed on JU1
(Table 1). This enables the internal 2.5V reference.
3) Connect the analog source (function generators or
user signals) to the analog input channels
(CH0–CH3). Install a shunt on JU2 to connect the
COM pin to GND.
4) Connect a logic analyzer, word generator, or other
source for the digital data lines D0–D7. These signals
are available on the 40-pin header (Table 2).
5) Connect the digital control signals for
CS, RD, WR,
and HBEN. These signals are available on the 40-pin
header or on the BNC connectors.
6) Connect the clock signal (0.1MHz to 7.6MHz) to the
CLK BNC connector or leave the pin open to use
the internal clock.
7) Turn on the VDD and VLOGIC supplies. Enable the
digital signal source.
8) Turn on the analog sources. The system is ready
for use.
9) Use the logic analyzer for data analysis.
Table 1. Jumper Functions
JUMPER
JU1
JU2
STATE
Open
Shorted
Open
Shorted
FUNCTION
REFADJ pin open or driven externally
REFADJ pin shorted to V
DD
*
COM pin open or driven externally
COM pin shorted to AGND
*The
MAX1292’s 2.5V reference must be disabled before an
external reference voltage is connected. Installing a shunt
across JU1 connects the REFADJ pin to V
DD
and disables the
on-board reference.
Table 2. 40-Pin Header (J1) Signals
PIN NUMBER
1, 3, 5, 7, 9, 11, 13, 15,
17, 19, 21, 23, 25, 27, 29,
31, 33, 35, 37, 39
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30, 32, 34, 36, 38, 40
SIGNAL
GND
D0/D8
D1/D9
D2/D10
D3/D11
D4
D5
D6
D7
HBEN
INT
RD
WR
CLK
CS
N.C.
Detailed Description
Analog Input Signals
The analog inputs are configured for using a function
generator. The inputs have 51Ω loads and 0.1µF capaci-
tors to match the generator’s impedance. It might be
necessary to remove these if the board is connected to
the user’s system. The system must provide low imped-
ance and any necessary anti-aliasing filtering.
Grounding
The MAX1292 evaluation board uses two ground planes
to reduce noise. All digital signals connect to the digital
ground plane (DGND), and the noise-sensitive analog
signals connect to the separate analog ground plane
(AGND). The two grounds connect at only one point
near the ground pin (pin 20) of the MAX1292. The
ground connection (RGND) for the optional external ref-
erence supply is connected directly to the same point.
This “star” ground configuration is common in low-noise
analog systems.
2
_______________________________________________________________________________________
AGND
V
LOGIC
R1–G
47kΩ
U1
DGND
VLOGIC
24
23
22
VDD
21
20
19
18
17
16
15
14
13
JU2
COM
C11
0.1µF
C7
0.01µF
RGND
C6
0.01µF
JU1
REFADJ
C3
0.1µF
C4
4.7µF
10V
C1
0.1µF
VLOGIC
J1–18
R2
51Ω
1
HBEN
D7
D6
D5
D4
D3/D11
D2/D10
D1/D9
D0/D8
INT
RD
WR
CLK
CS
CH3
CH2
CH1
CH0
C5
4.7µF
10V
COM
GND
REFADJ
REF
V
DD
C2
4.7µF
10V
V
LOGIC
2
3
4
5
6
7
8
9
10
V
LOGIC
11
12
R1-1
47kΩ
J1–20
INT
10
R11
51Ω
CH0
C10
0.1µF
J1–24
WR
C9
0.1µF
R5
51Ω
R1–H
47kΩ
9
R1–F
R1–E R1–D R1–C
R1–B R1–A
47kΩ 47kΩ 47kΩ 47kΩ 47kΩ 47kΩ
8
7
6
5
4
3
2
MAX1292
HBEN
J1–16
J1–14
J1–12
Figure 1. MAX1292 EV Kit Schematic
REF
J1–22
RD
R4
51Ω
R10
51Ω
CH1
J1–26
CLK
CH2
J1–28
CS
R7
51Ω
C8
0.1µF
R8
51Ω
CH3
C12
0.1µF
N.C.
N.C.
R12
51Ω
R6
51Ω
R9
51Ω
J1–10
J1–8
J1–6
J1–4
J1–2
J1–1
J1–3
J1–5
J1–7
J1–9
J1–11
J1–13
J1–15
J1–17
J1– 19
J1–21
J1–23
J1–25
J1–27
J1–29
J1–31
J1–33
J1–35
J1–37
J1–39
N.C.
J1–36
J1–40
N.C.
J1–38
J1–30
N.C.
Evaluates: MAX1292/MAX1293
_______________________________________________________________________________________
J1–32
N.C.
J1–34
N.C.
MAX1292 Evaluation Kit
3
MAX1292 Evaluation Kit
Evaluates: MAX1292/MAX1293
1.0"
1.0"
Figure 2. MAX1292 EV Kit Component Placement Guide—
Component Side
Figure 3. MAX1292 EV Kit PC Board Layout—Component Side
1.0"
1.0"
Figure 4. MAX1292 EV Kit PC Board Layout—Interior Layer 1
Figure 5. MAX1292 EV Kit PC Board Layout—Interior Layer 2
4
_______________________________________________________________________________________
MAX1292 Evaluation Kit
Evaluates: MAX1292/MAX1293
1.0"
Figure 6. MAX1292 EV Kit PC Board Layout—Solder Side
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 _____________________
5
© 1999 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products.
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