AS1374
Dual 200mA, Low-Noise, High-PSRR,
Low Dropout Regulator
General Description
The AS1374 is a low-noise, low-dropout linear regulator with
two separated outputs. Designed to deliver 200mA continuous
output current at each output pin, the LDOs can achieve a low
120mV dropout for 200mA load current and are designed and
optimized to work with low-cost, small-capacitance ceramic
capacitors.
An integrated P-channel MOSFET pass transistor allows the
devices to maintain extremely low quiescent current (30μA).
The AS1374 uses an advanced architecture to achieve ultra-low
output voltage noise of 20μV
RMS
and a power-supply
rejection-ratio of better than 85dB (@ 1kHz).
Two active-High enable pins allows to switch on or off each
output independently from each other.
The AS1374 requires only 1μF output capacitor for stability at
any load.
The device is available in a 6-bump WLCSP package.
Ordering Information
and
Content Guide
appear at end of
datasheet.
Key Benefits & Features
The benefits and features of AS1374, Dual 200mA, Low-Noise,
High-PSRR, Low Dropout Regulator are listed below:
Figure 1:
Added Value of Using AS1374
Benefits
Features
•
Input voltage from 2.0V to 5.5V
•
Low quiescent current of 30μA
•
Low dropout of 120mV at 200mA load
•
Output voltage from 1.2V to 3.6V
•
Guaranteed output current of 200mA
•
Pull-down option in shutdown (factory set)
•
Integrated temperature and output power
monitoring
•
Small external components needed
•
Small 6-balls WLCSP package
•
Ideal for battery-powered applications
•
Supports a variety of end applications
•
Overtemperature and overcurrent protection
and shutdown
•
Cost-effective, small PCB area needed
ams Datasheet
[v2-00] 2016-Jun-22
Page 1
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AS1374 −
General Description
Applications
The devices are ideal for mobile phones, wireless phones, PDAs,
handheld computers, mobile phone base stations, Bluetooth
portable radios and accessories, wireless LANs, digital cameras,
personal audio devices, and any other portable,
battery-powered application.
Figure 2:
A1374 Typical Application Circuit
Input
2.0V to 5.5V
VDD
CIN
1uF
ON
OFF
OUT1
COUT1
1uF
Output1
1.2V to 3.6V
EN1
AS1374
OUT2
COUT2
1uF
ON
OFF
EN2
Output2
1.2V to 3.6V
GND
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ams Datasheet
[v2-00] 2016-Jun-22
AS1374 −
General Description
Block Diagram
The functional blocks of this device are shown below:
Figure 3:
A1374 Block Diagram
AS1374
EN1
Enable
Logic CH1
OUT1
VDD
Thermal
Protection
Common
Logic
Bandgap
Trimmable
Reference
Overcurrent
Protection CH1
GND
Overcurrent
Protection CH2
EN2
Enable
Logic CH2
OUT2
ams Datasheet
[v2-00] 2016-Jun-22
Page 3
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AS1374 −
Pin Assignment
Pin Assignment
Figure 4:
Pin Diagram
Pin A1
indicator
A1
OUT2
A2
VDD
A3
OUT1
B1
EN2
B2
GND
B3
EN1
Figure 5:
Pin Descriptions
Pin Number
A1
A2
A3
B1
B2
B3
Pin Name
OUT 2
VDD
OUT 1
EN 2
GND
EN 1
Description
Regulated Output Voltage 2. Bypass this pin with a capacitor to GND.
See
Application Information
for capacitor selection.
Input Supply
Regulated Output Voltage 1. Bypass this pin with a capacitor to GND.
See
Application Information
for capacitor selection.
Enable 2. Pull this pin to logic low to disable Regulated Output 2
voltage.
Ground
Enable 1. Pull this pin to logic low to disable Regulated Output 1
voltage.
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ams Datasheet
[v2-00] 2016-Jun-22
AS1374 −
Absolute Maximum Ratings
Absolute Maximum Ratings
Stresses beyond those listed in
Absolute Maximum Ratings
may
cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any
other conditions beyond those indicated in
Electrical
Characteristics
is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device
reliability.
Figure 6:
Absolute Maximum Ratings
Parameter
Min
Max
Units
Comments
Electrical Parameters
VDD to GND
All other pins to GND
Output short-circuit duration
Input current (latch-up immunity)
-100
-0.3
-0.3
7
VDD + 0.3
Infinite
100
mA
JEDEC 78
V
V
Electrostatic Discharge
Electrostatic discharge HBM
±2
kV
MIL 883 E method 3015
Temperature Ranges and Storage Conditions
Junction-to-ambient thermal
resistance is very dependent on
application and board-layout. In
situations where high maximum
power dissipation exists, special
attention must be paid to thermal
dissipation during board design.
Thermal resistance
Θ
JA
201.7
ºC/W
Junction temperature
Storage temperature range
-55
125
150
ºC
ºC
The reflow peak soldering
temperature (body temperature)
specified is in accordance with
IPC/JEDEC J-STD-020“Moisture/Reflow
Sensitivity Classification for
Non-Hermetic Solid State Surface
Mount Devices”.
Package body temperature
260
ºC
Relative humidity non-condensing
Moisture sensitivity level
5
1
85
%
Maximum floor life time of Unlimited
ams Datasheet
[v2-00] 2016-Jun-22
Page 5
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