DATASHEET
ISL8204M, ISL8206M
Complete High Efficiency DC/DC Power Module
The ISL8204M, ISL8206M is a family of pin-compatible power
modules to the ISL8201M. These are simple and easy to use,
high power DC/DC modules and are ideal for a wide variety of
applications. The ISL820xM family of high current DC/DC
step-down modules virtually eliminate design and
manufacturing risks while dramatically improving time to
market.
The simplicity is in the family's "Off The Shelf" unassisted
implementation. All you need is the ISL820xM for the current
requirement of your design, bulk input and output capacitors
and one resistor, to program the output voltage, and you have
a complete high current power design ready for your market.
This family of buck converters is packaged in a thermally
enhanced compact (15mmx15mm) overmolded QFN Package
that operates without a heatsink, even at full load over
temperature. The package supports simple, reliable,
automated assembly using standard surface mount
equipment while making it easy to probe to all pins. The lack
of a required heat dissipation layer, provides easy access to all
pins and the limited number of the external components
reduce the PCB to a component layer and a simple ground
layer.
Additionally, each IC in the family is footprint compatible,
making it easy to change your design to meet different power
needs without changing your layout. One simple layout fits all.
FN6999
Rev 4.00
October 28, 2014
Features
• Complete switch mode power supply in one package
- ISL8204M - 4A with, 6.6A Peak
- ISL8206M - 6A with, 8.8A Peak
• Single resistor sets V
OUT
+0.6V up to +6V at ±1%
• Up to 95% efficiency
• Overcurrent protection
• Internal soft-start with pre-bias output start-up
• Wide input voltage range from 1VDC to 20VDC
• Fast transient response
Applications
• Servers
• Telecom and datacom applications
• Industrial equipment
• Point of load regulation
• General purpose step-down DC/DC
Related Literature
•
AN1386
“ISL8201M, ISL8204M, ISL8206M EVAL1Z
Evaluation Board User’s Guide”
• iSim model - (See respective device information page at
www.intersil.com)
P
VCC
C
PVCC
10µF
7
P
VCC
MAX LOAD CURRENT (A)
V
IN
(1V to 20V)
V
IN
220µF
V
OUT
V
OUT
(0.6V to 6.0V)
330µF
6
5
4
3
2
1
0
60
70
80
90
100
110
3.3V
1.5V
0.6V
ISL8204M/6M
Power Module
FB
R
FB
(Sets V
OUT
)
P
GND
AMBIENT TEMPERATURE (°C)
FIGURE 1. TYPICAL SCHEMATIC
FIGURE 2. DERATING CURVE (ISL8206M 5V
IN
)
TABLE 1. R
FB
VALUES FOR TYPICAL OUTPUT VOLTAGES
V
OUT
R
FB
0.6V
Open
1.05V
13k
1.2V
9.76k
1.5V
6.49k
1.8V
4.87k
2.5V
3.09k
3.3V
2.16k
5V
1.33k
FN6999 Rev 4.00
October 28, 2014
Page 1 of 19
ISL8204M, ISL8206M
Simplified Block Diagram
PVCC
VIN
SAMPLE
AND
HOLD
-
21.5µA
ISET
FB
0.6V
+
-
0.4V
COMP/EN
+
-
OSCILLATOR
RSET-IN
PWM Controller
PGND
DIS
DRIVER
+
-
PWM
GATE
CONTROL
LOGIC
PVCC
+
VOUT
POR
AND
SOFT-START
PGND
LDO
DRIVER
INHIBIT
RFB-TI
ISET
PHASE
FIGURE 3. INTERNAL BLOCK DIAGRAM
Ordering Information
PART NUMBER
(Notes
1, 2, 3)
ISL8204MIRZ
ISL8206MIRZ
ISL8204MEVAL1Z
ISL8206MEVAL1Z
NOTES:
1. Add “-T*” suffix for tape and reel. Please refer to
TB347
for details on reel specifications.
2. These Intersil plastic packaged products are RoHS compliant by EU exemption 7C-I and employ special Pb-free material sets, molding compounds/die
attach materials, and 100% matte tin plate plus anneal (e3) termination finish which is compatible with both SnPb and Pb-free soldering operations.
Intersil RoHS compliant products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC
J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for
ISL8204M, ISL8206M.
For more information on MSL please see techbrief
TB363.
PART
MARKING
ISL8204M
ISL8206M
Evaluation Board
Evaluation Board
TEMP.
RANGE (°C)
-40 to +85
-40 to +85
PACKAGE
(RoHS Compliant)
15 Ld QFN
15 Ld QFN
L15.15x15
L15.15x15
PKG.
DWG. #
Summary of Features
PART NUMBER
ISL8206M
ISL8204M
RATED CURRENT
(A)
6
4
R
ISET
(k)
4.12
2.87
LS FET r
DS(ON)
(m)
15
15
MAX V
OUT
(V)
6
6
FN6999 Rev 4.00
October 28, 2014
Page 2 of 19
ISL8204M, ISL8206M
Pin Configuration
ISL8204M, ISL8206M
(15 LD QFN)
TOP AND 3D VIEW
PGND
PGND
3
PGND
2
1 PGND
15 NC
PD1
14 FB
13 COMP/EN
PD4
PVCC
5
ISET
7
VIN
NC
9
8
NC
6
4
PHASE 10
PD2
12 VOUT
PD3
11 PGND
Pin Descriptions
PIN
1, 2, 3, 4
SYMBOL
PGND
DESCRIPTION
Power ground pin for signal, input, and output return path. PGND needs to connect to one (or more) ground plane(s)
immediately, which is recommended to minimize the effect of switching noise, copper losses, and maximize heat
dissipation. Range: 0V.
This pin provides the bias supply for ISL8204M, ISL8206M, as well as the low-side MOSFET’s gate and high-side
MOSFET’s gate. If PVCC rises above 6.5V, an internal 5V regulator will supply to the internal logics bias (but high-side
and low-side MOSFET gate will still be sourced by PVCC). Connect a well decoupled +5V or +12V supply to this pin.
Connect 1µF ceramic capacitor to ground plane directly. Range: 4.5V to 14.4V.
No internal connection.
The ISET pin is the input for the overcurrent protection (OCP) setting, which compares the r
DS(ON)
of the low-side
MOSFET to set the overcurrent threshold. The ISL8204M, ISL8206M has an initial protect overcurrent limit. It has an
integrated internal 4.12k2.87k resistor (R
SET-IN
) between the ISET and PGND pins, which can prevent significant
overcurrent impact to the module. One can also connect an additional resistor R
SET-EX
between the ISET pin and the
PGND pin in order to reduce the current limit point by paralleling. Range: 0 to PVCC.
Power input pin. Apply input voltage between the VIN pin and PGND pin. It is recommended to place an input decoupling
capacitor directly between the VIN pin and the PGND pin. The input capacitor should be placed as closely as possible to
the module. Range: 1V to 20V.
The PHASE pin is the switching node between the high and low-side MOSFET. It also returns the current path for the
high-side MOSFET driver and detects the low-side MOSFET drain voltage for the overcurrent limits point. Range: 0V to 30V.
Power ground pin for signal, input, and output return path. PGND needs to connect to one (or more) ground plane(s)
immediately, which is recommended to minimize the effect of switching noise, copper losses, and maximize heat
dissipation. Range: 0V.
Power output pin. Apply output load between this pin and the PGND pin. It is recommended to place a high frequency
output decoupling capacitor directly between the VOUT pin and the PGND pin. The output capacitor should be placed as
closely as possible to the module. Range: 0.6V to 6V.
5
PVCC
6, 8, 15
NC
7
ISET
9
VIN
(PD1)
PHASE
(PD2)
PGND
(PD3)
VOUT
(PD4)
10
11
12
FN6999 Rev 4.00
October 28, 2014
Page 3 of 19
ISL8204M, ISL8206M
Pin Descriptions
PIN
13
SYMBOL
COMP/EN
(Continued)
DESCRIPTION
This is the multiplexed pin of the ISL8204M, ISL8206M. During soft-start and normal converter operation, this pin
represents the output of the error amplifier. Use COMP/EN in combination with the FB pin to compensate for the voltage
control feedback loop of the converter. Pulling COMP/EN low (V
ENDIS
= 0.4V nominal) will disable (shutdown) the controller,
which causes the oscillator to stop, and the high-side gate and low-side gate of the MOSFETs outputs to be held low. The
external pull-down device will initially need to overcome a maximum of 5mA of COMP/EN output current. However, once
the controller is disabled, the COMP/EN output will also be disabled, thus only a 20µA current source will continue to draw
current. Range: 0V to 5V.
The FB pin is the output voltage adjustment of the ISL8204M, ISL8206M. It will regulate to 0.6V at the FB pin with
respect to the PGND pin. The ISL8204M, ISL8206M has an integrated voltage dividing resistor. This is a precision
9.76kΩ resistor (RFB-TI) between the VOUT and FB pins. Different output voltages can be programmed with
additional resistors between FB to PGND. Range: 0.6V.
14
FB
FN6999 Rev 4.00
October 28, 2014
Page 4 of 19
ISL8204M, ISL8206M
Absolute Maximum Ratings
C
OMP/EN
to P
GND
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
GND
- 0.3V to +6V
I
SET
to P
GND
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
GND
- 0.3V to P
VCC
+ 0.3V
P
VCC
to P
GND
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
GND
- 0.3V to +15V
P
HASE
to P
GND
(Note
4)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -1.2V ~ +30V
V
IN
to P
HASE
(Note
4).
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -1.2V ~ +30V
Junction Temperature, T
J
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +125°C
Storage Temperature Range, T
STG
. . . . . . . . . . . . . . . . . . -55°C to +125°C
ESD Rating
Human Body Model (Tested per JESD22-A114E) . . . . . . . . . . . . . . . . 2kV
Machine Model (Tested per JESD22-A115-A) . . . . . . . . . . . . . . . . . 100V
Charge Device Model (Tested per JESD22-C101C). . . . . . . . . . . . . . . 1kV
Latch Up (Tested per JESD-78B; Class 2, Level A) . . . . . . . . . . . . . . 100mA
Thermal Information
Thermal Resistance (Typical)
JA
(°C/W)
JC
(°C/W)
15 Ld QFN (Notes
5, 6)
. . . . . . . . . . . . . . . .
13.0
2.0
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see
TB493
Recommended Operating Ratings
Input Supply Voltage (V
IN
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +1V to +20V
Output Voltage (V
OUT
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.6V to +6V
P
VCC
Fixed Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +5V or +12V
Wide Range Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +6.5V to +14.4V
Ambient Temperature Range (T
A
) . . . . . . . . . . . . . . . . . . . -40°C to +85°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
4. V
DS
(Drain to Source) specification for internal high-side and low-side MOSFET.
5.
JA
is measured in free air with the component mounted on a high effective thermal conductivity test board (i.e. 4-layer type without thermal vias
– see tech brief
TB379)
per JEDEC standards except that the top and bottom layers assume solid planes.
6. For
JC
,
the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications
PARAMETER
INPUT CHARACTERISTICS
Input Supply Bias Current
Input In-rush Current
Input Supply Current
T
A
= +25°C. V
IN
= 12V, V
OUT
= 1.5V. C
IN
= 220µFx1, 10µF/Ceramicx2, C
OUT
= 47µFx8/Ceramic. Boldface limits
apply over the operating temperature range, -40°C to +85°C.
SYMBOL
CONDITIONS
MIN
(Note
8)
TYP
MAX
(Note
8)
UNITS
I
Q(VIN)
I
inRush
I
S(VIN)
I
OUT
= 0A, V
OUT
= 1.5V, V
IN
= 12V, P
VCC
= 12V
I
OUT
= 0A, V
OUT
= 1.5V, V
IN
= 12V, P
VCC
= 12V
I
OUT
= 6A, V
OUT
= 1.5V, V
IN
= 12V, P
VCC
= 12V
I
OUT
= 4A, V
OUT
= 1.5V, V
IN
= 12V, P
VCC
= 12V
-
-
-
-
13
140
0.86
0.56
-
-
-
-
mA
mA
A
A
OUTPUT CHARACTERISTICS
Output Continuous Current Range
I
OUT(DC)
V
IN
= 12V, V
OUT
= 1.5V
ISL8206M
ISL8204M
Line Regulation Accuracy
Load Regulation Accuracy
Peak-to-Peak Output Ripple Voltage
V
OUT
/V
IN
V
OUT
/I
OUT
V
OUT
V
OUT
= 1.5V, I
OUT
= 0A, V
IN
= 3.3V to 20V,
P
VCC
= 5V
I
OUT
= 0A to 6A/4A, V
OUT
= 1.5V, V
IN
= 12V,
P
VCC
= 12V
ISL8206M
I
OUT
= 6A V
OUT
= 1.5V, V
IN
= 12V,
P
VCC
= 12V
ISL8204M
I
OUT
= 4A V
OUT
= 1.5V, V
IN
= 12V,
P
VCC
= 12V
DYNAMIC CHARACTERISTICS
Voltage Change For Positive Load Step
Voltage Change For Negative Load Step
V
OUT-DP
V
OUT-DN
I
OUT
= 0A to 4A. Current slew rate = 2.5A/µs,
V
IN
= 12V, V
OUT
= 1.5V, P
VCC
= 12V
I
OUT
= 0A to 4A. Current slew rate = 2.5A/µs,
V
IN
= 12V, V
OUT
= 1.5V, P
VCC
= 12V
-
-
30
27
-
-
mV
mV
-
7
-
mV
0
-
-
-
-
0.1
0.5
8
0
-
6
4
-
-
-
A
A
%
%
mV
FN6999 Rev 4.00
October 28, 2014
Page 5 of 19
嵌入式系统
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