PRODUCT DATA SHEET
PhlatLight
®
White LED
Illumination Products
SST-50 Series
Features
•
Extremely high optical output: Over 1,250 lumens from a sin-
gle chip (white)
•
Extremely high efficiency: Over 100 lumens per watt at
1.75A
•
High thermal conductivity package - junction to case thermal
resistance of only 2.45 °C/W
PhlatLight
®
LEDs enable a new class of illumination
applications.
•
Large, monolithic chip with uniform emitting area of 5 mm
2
•
Lumen maintenance of greater than 70% after 60,000 hours
•
Environmentally friendly: RoHS compliant
•
Variable drive currents: less than 1 A through 5 A to full reli-
ability specifications
Table of Contents
Technology Overview............................................ 2
Test Specifications............................................... 2
PhlatLight Bin Codes............................................. 3
•
High reliability
•
Electrically isolated thermal path
Applications
•
Replacement Lamps
•
High Bay Lighting
•
Street Lighting
•
Consumer Portable
•
Architectural Lighting
•
Retail Lighting
•
Residential Lighting
•
Spot Lighting
Product Shipping and Labeling Information.................. 7
Optical and Electrical Characteristics ........................ 8
Spectral Characteristics........................................10
Radiation Patterns ..............................................11
Thermal Resistance .............................................12
Mechanical Dimensions - Emitter .............................13
Mechanical Dimensions - Star .................................14
Solder Profile ....................................................15
Ordering Information ...........................................16
www.luminus.com
© 2011 Luminus Devices, Inc. - All Rights Reserved
Last Update 1-31-2011
PDS_001345 Rev 05
SST-50 - Product Datasheet
Technology Overview
PhlatLight LEDs benefit from a suite of innovations in the fields of chip technology, packaging, and thermal management. These break-
throughs allow illumination designers to achieve efficient light engine designs and deliver high brightness solutions.
PhlatLight Technology
The name PhlatLight is derived from Photonic Lattice. Photonic
lattice technology creates true surface emission from the source,
which enables large area LED chips with uniform brightness over
the entire LED chip surface. The optical power and brightness
produced by these large monolithic chips enable solutions which
replace arc and halogen lamps where arrays of traditional high
power LEDs cannot.
Reliability
Designed from the ground up, PhlatLight LEDs are one of the most
reliable light sources in the world today. PhlatLight LEDs have
passed a rigorous suite of environmental and mechanical stress
tests, including mechanical shock, vibration, temperature cycling
and humidity, and have been fully qualified for use in extreme
high power and high current applications. With very low failure
rates and median lifetimes that are well above 60,000 hours,
PhlatLight LEDs are ready for the most demanding applications.
Packaging Technology
Thermal management is critical in high power LED applications.
With a thermal resistance from junction to case of 2.45 °C/W,
PhlatLight SST-50 devices have among the lowest thermal resis-
tance values of any LED on the market. This allows the LED to be
driven at higher current densities while maintaining a low junc-
tion temperature, thereby resulting in brighter and longer life-
times. The package is easy to use, and ready to be mounted in
the lighting system.
Environmental Benefits
PhlatLight LEDs help reduce power consumption and the amount
of hazardous waste entering the environment. All PhlatLight
products manufactured by Luminus are RoHS compliant and free
of hazardous materials, including lead and mercury.
Understanding PhlatLight Test Specifications
Every PhlatLight LED device is fully tested to ensure that it meets the high quality standards of Luminus’ products.
Multiple Operating Points (1.75A, 5.0A)
The tables on the following pages provide typical optical and
electrical characteristics. Since the LEDs can be operated over a
wide range of drive conditions (currents from less than 1.0A to
5.0A, and duty cycle from <1% to 100%) multiple drive conditions
are listed.
PhlatLight SST-50 devices are production tested at 1.75A. The
values shown at 5.0A are for additional reference at other possi-
ble drive conditions.
© 2011 Luminus Devices, Inc. - All Rights Reserved
Page 2
SST-50 - Product Datasheet
PhlatLight White Binning Structure
PhlatLight SST-50 White LEDs are tested for luminous flux and chromaticity at a drive current of 1.75A and placed into one of the fol-
lowing luminous flux (FF) and chromaticity (WW) bins:
For ordering information, please refer to page 16 or PDS-001393: PhlatLight Binning and Labeling.
Flux Bins (T
J
= 25 ºC)
Color
W65S
6500K, Standard CRI (typ. 70)
Flux Bin (FF)
WG
WH
WJ
WG
WH
WJ
WG
WH
WJ
WF
WG
Minimum Flux (lm)
@ 1.75 A
275
350
425
275
350
425
275
350
425
220
275
Maximum Flux (lm)
@ 1.75 A
350
425
500
350
425
500
350
425
500
275
350
W57S
5700K, Standard CRI (typ. 70)
W45S
4500K, Standard CRI, (typ. 70)
W30M
3000K, Moderate CRI, (typ. 83)
•Note: Luminus maintains a tolerance of +/- 6% on flux measurements.
© 2011 Luminus Devices, Inc. - All Rights Reserved
Page 3
SST-50 - Product Datasheet
Chromaticity Bins
Luminus’ Standard Chromaticity Bins: 1931 CIE Curve
0.470
0.445
3500K
4000K
ES
T4
S4
R4
Q4
R3
Q3
P3
N3
DP
DR
DT
T3
S3
DV
U3
V3
U4
2700K
3000K
EU
V4
W3
DY
W4
Y4
EW
0.420
EQ
BB Locus
Y3
0.395
5000K
4500K
EN
P4
N4
M4
K4
J4
K3
J3
H3
DJ
DM
M3
CIEy
0.370
6500K
5700K
EH
H4
G4
G3
DG
EK
0.345
F4
EF
0.320
DE
F3
0.295
DF
0.270
0.275
0.300
0.325
0.350
0.375
CIEx
0.400
0.425
0.450
0.475
0.500
© 2011 Luminus Devices, Inc. - All Rights Reserved
Page 4
SST-50 - Product Datasheet
The following tables describe the four chromaticity points that bound each chromaticity bin. Chromaticity bins are grouped together
based on the color temperature.
6500K Chromaticity Bins
Bin Code
(WW)
DG
5700K Chromaticity Bins
Bin Code
(WW)
DJ
5000K Chromaticity Bins
Bin Code
(WW)
EK
CIEx
0.307
0.322
0.323
0.309
0.305
0.313
0.315
0.307
0.303
0.312
0.313
0.305
0.313
0.321
0.322
0.315
0.312
0.321
0.321
0.313
0.302
0.320
0.321
0.303
0.283
0.303
0.307
0.289
0.289
0.307
0.309
0.293
CIEy
0.311
0.326
0.316
0.302
0.321
0.329
0.319
0.311
0.330
0.339
0.329
0.321
0.329
0.337
0.326
0.319
0.339
0.348
0.337
0.329
0.335
0.354
0.348
0.330
0.304
0.330
0.311
0.293
0.293
0.311
0.302
0.285
CIEx
0.322
0.337
0.336
0.323
0.321
0.329
0.329
0.322
0.321
0.329
0.329
0.321
0.329
0.337
0.337
0.330
0.329
0.338
0.337
0.329
0.320
0.338
0.338
0.321
CIEy
0.324
0.337
0.326
0.314
0.335
0.342
0.331
0.324
0.346
0.354
0.342
0.335
0.342
0.349
0.337
0.331
0.354
0.362
0.349
0.342
0.352
0.368
0.362
0.346
CIEx
0.338
0.356
0.355
0.338
0.337
0.345
0.345
0.337
0.338
0.347
0.345
0.337
0.345
0.353
0.352
0.344
0.346
0.355
0.353
0.345
0.337
0.352
0.350
0.336
CIEy
0.368
0.384
0.376
0.362
0.349
0.355
0.343
0.337
0.362
0.369
0.355
0.349
0.355
0.362
0.349
0.343
0.369
0.376
0.362
0.355
0.337
0.349
0.337
0.326
F3*
H3*
K3*
F4*
H4*
K4*
G3*
J3*
M3*
G4*
J4*
M4*
EF
EH
DM
DE
DF
* Sub-bins within ANSI defined quadrangles per ANSI C78.377-2008
© 2011 Luminus Devices, Inc. - All Rights Reserved
Page 5
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