BT1306-400D/600D
Logic level triac
Rev. 01 — 19 February 2004
M3D186
Product data
1. Product profile
1.1 Description
Logic level sensitive gate triac intended to be interfaced directly to microcontrollers,
logic integrated circuits and other low power gate trigger circuits.
1.2 Features
s
Sensitive gate in all four quadrants
s
Low cost package.
1.3 Applications
s
General purpose bidirectional
switching
s
Solid state relays
s
Phase control applications
s
Low power AC fan speed controllers.
1.4 Quick reference data
s
V
DRM
≤
600 V (BT1306-600D)
s
I
TSM
≤
8 A
s
V
DRM
≤
400 V (BT1306-400D)
s
I
T(RMS)
≤
0.6 A.
2. Pinning information
Table 1:
Pin
1
2
3
Pinning - SOT54 (TO-92), simplified outline and symbol
Description
main terminal 2
gate
main terminal 1
1
1
2
3
2
MSB033
Simplified outline
Symbol
3
MBL305
SOT54 (TO-92)
Philips Semiconductors
BT1306-400D/600D
Logic level triac
3. Ordering information
Table 2:
Ordering information
Package
Name
BT1306-600D
BT1306-400D
TO-92
TO-92
Description
Plastic single-ended leaded (through hole) package; 3 leads
Plastic single-ended leaded (through hole) package; 3 leads
Version
SOT54
SOT54
Type number
4. Limiting values
Table 3:
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
V
DRM
repetitive peak off-state voltage
BT1306-600D
BT1306-400D
I
T(RMS)
I
TSM
on-state current (RMS value)
full sine wave; T
lead
≤
65
°C;
Figure 1
and
2
non-repetitive peak on-state current full sine wave; T
j
= 25
°C
prior to surge;
Figure 3
and
4
t = 20 ms
t = 16.7 ms
I
2
t
dI
T
/dt
I
2
t for fusing
repetitive rate of rise of on-state
current after triggering
t = 10 ms
I
TM
= 1 A; I
G
= 0.2 A; dI
G
/dt = 0.2 A/µs
T2+ G+
T2+ G−
T2− G−
T2− G+
I
GM
V
GM
P
GM
P
G(AV)
T
stg
T
j
gate current (peak value)
gate voltage (peak value)
gate power (peak value)
average gate power
storage temperature
junction temperature
t = 2
µs
max; T
case
≤
80
°C
t = 2
µs
max
-
-
-
-
-
-
-
-
−40
−40
50
50
50
10
1
5
5
0.1
+150
+125
A/µs
A/µs
A/µs
A/µs
A
V
W
W
°C
°C
-
-
-
8
8.8
0.32
A
A
A
2
s
25
°C ≤
T
j
≤
125
°C
-
-
-
600
400
0.6
V
V
A
Conditions
Min
Max
Unit
9397 750 12593
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data
Rev. 01 — 19 February 2004
2 of 11
Philips Semiconductors
BT1306-400D/600D
Logic level triac
0.8
IT(RMS)
(A)
0.6
003aaa037
3
IT(RMS)
(A)
003aaa041
2
0.4
1
0.2
0
0
50
100
Tlead (˚C)
150
0
10-3
10-2
1
tsurge (s)
10
f = 50 Hz
T
lead
≤
65
°C
Fig 1. Maximum permissible on-state current (RMS
value) as a function of lead temperature.
Fig 2. Maximum permissible repetitive on-state
current (RMS value) as a function of surge
duration for sinusoidal currents.
103
I
ITSM
(A)
102
T
003aaa040
I TSM
10
ITSM
(A)
8
003aaa038
tp
time
6
dIT/dt limit
T2- G+ quadrant
10
2
4
1
10-5
10-4
10-3
10-2
tp (s)
10-1
0
1
10
102
n
103
t
p
≤
20 ms
initial T
j
≤
25
°C
n = number of cycles
f = 50 Hz
initial T
j
≤
25
°C
Fig 3. Maximum permissible non-repetitive peak
on-state current as a function of pulse width for
sinusoidal currents.
Fig 4. Maximum permissible non-repetitive peak
on-state current as a function of number of
cycles for sinusoidal currents; typical values.
9397 750 12593
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data
Rev. 01 — 19 February 2004
3 of 11
Philips Semiconductors
BT1306-400D/600D
Logic level triac
5. Thermal characteristics
Table 4:
Symbol
R
th(j-lead)
R
th(j-a)
Thermal characteristics
Parameter
thermal resistance from junction to lead
thermal resistance from junction to ambient
Conditions
full cycle
half cycle
mounted on a printed-circuit board; -
lead length = 4 mm;
Figure 5
150
Min
-
Typ
-
Max
60
80
-
K/W
Unit
K/W
5.1 Transient thermal impedance
103
Zth(j-a)
(K/W)
003aaa029
102
10
P
tp
t
1
10-5
10-4
10-3
10-2
10-1
1
tp (s)
10
Fig 5. Transient thermal impedance from junction to ambient as a function of pulse duration; typical values.
9397 750 12593
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data
Rev. 01 — 19 February 2004
4 of 11
Philips Semiconductors
BT1306-400D/600D
Logic level triac
6. Characteristics
Table 5:
Characteristics
T
j
= 25
°
C unless otherwise specified.
Symbol
I
GT
Parameter
gate trigger current
Conditions
V
D
= 12 V; I
T
= 0.1 A;
Figure 8
T2+ G+
T2+ G−
T2− G−
T2− G+
I
L
latching current
V
D
= 12 V; I
T
= 0.1 A;
Figure 9
T2+ G+
T2+ G−
T2− G−
T2− G+
I
H
V
T
V
GT
I
D
dV
D
/dt
holding current
on-state voltage
gate trigger voltage
off-state leakage current
critical rate of rise of off-state
voltage
V
D
= 12 V; I
GT
= 0.1 A;
Figure 10
I
T
= 0.85 A;
Figure 11
V
D
= 12 V; I
T
= 0.1 A;
Figure 7
V
D
= V
DRM
; I
T
= 0.1 A; T
j
= 110
°C
V
D
= V
DRM(max)
; T
j
= 110
°C
V
D
= 67% of V
DM(max)
; T
case
= 110
°C;
exponential waveform; gate open circuit;
Figure 12
Dynamic characteristics
30
45
-
V/µs
-
-
-
-
-
-
-
0.1
-
1
5
1
2
1
1.4
0.9
0.7
3
10
10
10
10
10
1.9
2
-
100
mA
mA
mA
mA
mA
V
V
V
µA
-
-
-
-
1
2
2
4
5
5
5
7
mA
mA
mA
mA
Min
Typ
Max
Unit
Static characteristics
dV
com
/dt
t
gt
critical rate of rise of commutation V
D
= rated V
DM
; T
case
= 50
°C;
I
TM
= 0.84 A;
voltage
commutating dI/dt = 0.3 A/ms
gate controlled turn-on time
I
TM
= 1.0 A; V
D
= V
DRM(max)
; I
G
= 25 mA;
dI
G
/dt = 5 A/µs
-
-
5
2
-
-
V/µs
µs
9397 750 12593
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data
Rev. 01 — 19 February 2004
5 of 11
聊聊、笑笑、闹闹
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
