303261, 303262, 303263, 303264, 303265, 303266
Ultra High-Precision Wrap-Around Chip echnologyConfiguration
UltraHigh-PrecisionWrap-AroundChipResistors,FRSMZ1FoilTResistors,
FRSM Z1 Foil Technology Configuration
Screen/Test Flow in Compliance with
EEE-INST-002 (Tables 2A and 3A, Film/Foil, Level 1) and MIL-PRF-55342
FEATURES
• Temperature coefficient of resistance (TCR) (see table 1
and fig. 3):
±0.2 ppm/°C typical (–55°C to +125°C, +25°C ref.)
• Resistance tolerance: to ±0.01%
• Power coefficient “∆R due to self heating”: 5 ppm at
rated power
• Power rating: to 400 mW at +70°C (see table 2)
•
Load life stability: ±0.02% after 2,000 hrs at 70°C at
rated power.
• Resistance range: 10 Ω to 75 kΩ (for higher and lower
values, please contact us)
• Bulk Metal
®
Foil resistors are not restricted to standard
values; specific “as required” values can be supplied at
no extra cost or delivery (e.g., 1K2345 vs. 1K)
• Thermal stabilization time: <1 s (within 10 ppm of steady
state value)
• Electrostatic discharge (ESD): at least to 25 kV
• Short time overload: ≤0.005% typical
• Rise time: 1 ns, effectively no ringing
• Current noise: <0.010 μV
RMS
/V of applied voltage
(<–40 dB)
• Non-inductive: <0.08 μH
• Non-hot spot design
• Terminal finishes available: tin/lead alloy
• Matched sets are available on request
• Fast prototype quantities are available. For more
information, please contact us.
• For higher temperature application up to +240°C and for
better performances, please contact us.
• Adding “U” to the model number (example: 303261U).
These units have all of the Table 2A (page 5) 100% tests
performed, with no destructive qualification testing
required (Table 3A, page 6). For more information,
please contact
foil@vpgsensors.com.
Top View
INTRODUCTION
The 303261 through 303266 series, tested per
EEE-INST-002 and MIL-PRF-55342, is based on the
new generation Z1 Foil Technology of the Bulk Metal
®
precision foil resistor elements by Vishay Foil Resistors
(VFR), which makes these resistors virtually insensitive
to destabilizing factors. Their element, based on the Z1
Foil Technology, is a solid alloy that displays the desirable
bulk properties of its parent material; thus, it is inherently
stable (remarkably improved load life stability of 25 ppm),
noise-free and withstands ESD to 25 kV or more. The
alloy is matched to the substrate and forms a single
entity with balanced temperature characteristics for an
unusually low and predictable TCR over a wide range
from –55°C to +150°C. Resistance patterns are photo-
etched to permit trimming of resistance values to very
tight tolerances.
The 303261 through 303266 series has a full wraparound
termination which ensures reliable handling during the
manufacturing process, as well as providing stability
during multiple thermal cycles.
Our application engineering department is available to
advise and make recommendations. For non-standard
technical requirements and special applications, please
contact us at foil@vpgsensors.com.
RELATED DOCUMENT
From our Technical Library, please see
Reading Between
the Lines in Resistor Datasheets.
RELATED VIDEO
From our Video Library, refer to
Z-Foil vs Thin Film
Resistors with Intersil Instrumentation Amplifier
(Demo
Video).
Document No.: 63253
Revision: 04-Jan-2016
For any questions, contact
foil@vpgsensors.com
www.vishayfoilresistors.com
1
303261, 303262, 303263, 303264, 303265, 303266
FIGURE 1—POWER DERATING CURVE
Percent of Rated Power
100
75
50
25
0
–75
–55°C
+70°C
TABLE 1—BEST TOLERANCE AND TCR VS.
RESISTANCE VALUE
(–55°C to +125°C, +25°C Ref.)
Resistance Value
Ω
250 to 75k
100 to <250
50 to <100
Tolerance (%)
±0.01%
±0.05%
±0.1%
±0.25%
±0.5%
Maximum TCR
(ppm/°C)
±3
±3
±4
±5
±5
–50
–25
0
+25
+50
+75
+100 +125 +150 +175
Ambient Temperature (°C)
25 to <50
10 to <25
FIGURE 2—TRIMMING TO VALUES
(conceptual illustration)
Interloop
Capacitance
Reduction
in Series
Mutual Inductance
Reduction due
to Change in
Current Direction
Current Path
Before Trimming
Current Path After Trimming
Trimming Process
Removes this Material
from Shorting Strip Area
Changing Current Path
and Increasing
Resistance
Note
To acquire a precision resistance value,
the Bulk Metal
®
Foil chip is trimmed by
selectively removing built-in “shorting bars.”
To increase the resistance in known increments,
marked areas are cut, producing progressively
smaller increases in resistance. This method
reduces the effect of “hot spots” and improves
the long-term stability of VFR resistors.
Foil shown in black, etched spaces in white
FIGURE 3—NOMINAL
RESISTANCE/TEMPERATURE CURVE
+400
+300
∆R
(ppm)
R
+500
TABLE 2—SPECIFICATIONS
(1)
Model
(Chip Size)
303261 (0603)
303262 (0805)
Rated
Power
at +70°C
(mW)
50
100
150
200
300
400
Max.
Working
Voltage
(≤√P
×
R )
14 V
22 V
46 V
57 V
102 V
173 V
Resistance
Range
(Ω)
100 to 2k
10 to 5k
10 to 14k
10 to 16k
10 to 35k
10 to 75k
Max.
Weight
(mg)
4
6
11
12
27
40
+200
+100
–100
–200
–400
–300
–500
0
0.05 ppm/°C
–0.1 ppm/°C
–0.16 ppm/°C
0.1 ppm/°C
0.14 ppm/°C
0.2 ppm/°C
303263 (1206)
303264 (1506)
303265 (2010)
303266 (2512)
+100
+125
–55
–25
0
+25
+60
+75
Ambient Temperature (°C) and TCR Chord Slopes for
Different Temperature Ranges
Notes
(1)
For tighter performances and non-standard values up to 125k,
please contact VPG application engineering at foil@vishaypg.
com.
www.vishayfoilresistors.com
2
For any questions, contact
foil@vpgsensors.com
Document No.: 63253
Revision: 04-Jan-2016
303261, 303262, 303263, 303264, 303265, 303266
TABLE 3—DIMENSIONS
in Inches (Millimeters)
Top View
L
T
D
Chip Size
0603
0805
1206
1506
2010
2512
L
±0.005 (0.13)
0.063 (1.60)
0.080 (2.03)
0.126 (3.20)
0.150 (3.81)
0.198 (5.03)
0.249 (6.32)
W
±0.005 (0.13)
0.032 (0.81)
0.050 (1.27)
0.062 (1.57)
0.062 (1.57)
0.097 (2.46)
0.127 (3.23)
W
Thickness Maximum
D
±0.005 (0.13)
0.011 (0.28)
0.015 (0.38)
0.020 (0.51)
0.020 (0.51)
0.025 (0.64)
0.032 (0.81)
0.025 (0.64)
TABLE 4—PERFORMANCES
Test or Conditions
Thermal Shock,
100 x (–65°C to +150°C), see Figure 6
Low Temperature Operation,
–65°C, 45 min at P
nom
Short Time Overload,
6.25 x Rated Power, 5 s
High Temperature Exposure,
+150°C, 100 h
Resistance to Soldering Heat,
+245°C for 5 s, +235°C for 30 s
Moisture Resistance
Load Life Stability,
+70°C for 2000 h at Rated Power, see Figure 7
Note
(3)
As shown +0.01
Ω
to allow for measurement errors at low values.
∆R
Limits of FRSM Series
Typical
Maximum
(3)
±0.005% (50 ppm)
±0.005% (50 ppm)
±0.005% (50 ppm)
±0.005% (50 ppm)
±0.005% (50 ppm)
±0.003% (30 ppm)
0.0025% (25 ppm)
±0.01% (100 ppm)
±0.015% (150 ppm)
±0.02% (200 ppm)
±0.015% (150 ppm)
±0.02% (200 ppm)
±0.025% (250 ppm)
±0.02% (200 ppm)
FIGURE 4—RECOMMENDED MOUNTING
1. IR and vapor phase reflow are recommended.
2. Avoid the use of cleaning agents that attack epoxy resins, which form part of the
resistor construction.
3. Vacuum pick up is recommended for handling.
4. If the use of a soldering iron becomes necessary, precautionary measures should be
taken to avoid any possible damage/overheating of the resistor.
*
Recommendation: The solder fillet profile should be such as to avoid running over the
top metallization.
*
Document No.: 63253
Revision: 04-Jan-2016
For any questions, contact
foil@vpgsensors.com
www.vishayfoilresistors.com
3
303261, 303262, 303263, 303264, 303265, 303266
TABLE 5—EEE-INST-002 (TABLE 2A FILM/FOIL, LEVEL 1) 100% TESTS/INSPECTIONS
Test or Inspection
Pre-cap Visual Inspection
RC Record
Thermal Shock
Power Conditioning
RC Record
Final Inspection
Visual Inspection
Mechanical Inspection
Result
Performed in production flow prior overcoating
In tolerance
25 x (–65°C to +150°C)
70°C, 100 h, 1.5 rated power—not to exceed max. voltage
In tolerance ∆R = 0.05% for thermal shock and conditioning combined
5% PDA on ∆R only, 10% PDA on “Out of Final Tolerance”
Materials, design, etc.
Physical dimensions, sample size: 3 units, zero failure
ELECTROSTATIC DISCHARGE (ESD)
ESD can be categorized into three types of damages:
Parametric Failure
occurs when the ESD event alters one or more device parameters (resistance in the case of
resistors), causing it to shift from its required tolerance. This failure does not directly pertain to functionality; thus a
parametric failure may be present while the device is still functional.
Catastrophic Damage
occurs when the ESD event causes the device to immediately stop functioning. This may occur
after one or a number of ESD events with diverse causes, such as human body discharge or the mere presence of an
electrostatic field.
Latent Damage
occurs when the ESD event causes moderate damage to the device, which is not noticeable, as the
device appears to be functioning correctly. However, the load life of the device has been dramatically reduced, and
further degradation caused by operating stresses may cause the device to fail during service. Latent damage is the
source for greatest concern, because it is very difficult to detect by re-measurement or by visual inspection, since
damage may have occurred under the external coating.
FIGURE 5—ESD TEST DESCRIPTION AND RESULTS
2500 V to 4500 V
1 MW
By using an electrolytic 500 pF capacitor charged up to 4500V,
pulses were performed on 10 units of 1206, 10 kΩ of three
different Surface Mount Chip Resistors technologies, with an
initial voltage spike of 2500V. The unit was allowed time to cool
down, after which the resistance measurement was taken and
displayed in ppm deviation from the initial reading. Readings
were then taken in 500V increments up to 4500V.
500 pF
Rx
Volts
2500
3000
3500
4000
4500
DMM
Thick Film
–2.7
–4.2
–6.2
–7.4
–8.6
∆R (%)
Thin Film
97
366
>5000
>5000
Open
Foil
<0.005
www.vishayfoilresistors.com
4
For any questions, contact
foil@vpgsensors.com
Document No.: 63253
Revision: 04-Jan-2016
303261, 303262, 303263, 303264, 303265, 303266
FIGURE 6—THERMAL SHOCK TEST
Test per MIL PRF 55342 4.8.3 Mil STD 202, Method 107
Test Conditions: 100 X (-65°C to +150°C), n=10
100
80
60
R (ppm)
40
20
0
-20
FIGURE 7—LOAD LIFE TEST FOR
2000 HRS @ +70°C AT RATED POWER
100
80
60
40
20
0
-20 0
-40
-60
-80
-100
250
500
750
1000 1250 1500 1750 2000 2250
0805-1K
0805-8K
1206-1K
1206-25K
2512-75K
2512-125K
R (ppm)
0805
1K
0805
8K
1206
1K
1206
25K
2512
1K
Time (hrs)
2512
75K
TABLE 6—EEE-INST-002 (TABLE 3A FILM/FOIL, LEVEL 1) DESTRUCTIVE TESTS
Group 2
Sample size: 3, zero failure
Solderability
Sample size: 10, zero failure—mounted on FR4
TCR (–55°C/+25°C/+125°C)
Values
≥100 Ω
50 Ω to <100 Ω
10 Ω to <50 Ω
∆R = 0.02%
Low temperature storage
Group 3
–65°C no load dwell for 24 h ±4 h
+25°C ambient no load dwell for 2 h to 8 h
∆R = 0.015%
Low temperature operation
–65°C no load dwell for 1 h
rated power for 45 min
+25°C ambient no load dwell for 2 h to 8 h
Short time overload
∆R = 0.02%
6.25 x rated power, 5 s—no “I” limitation: not to exceed twice the max. voltage
∆R = 0.02%
Performed per MIL-PRF-55342 para. 4.8.8.1
∆R = 0.02%
2000 h, +70°C, rated power
Performed per MIL-PRF-55342
Solder mounting integrity
Force applied: for 0630—1 kg, 30 s / for 0805, 1206, and 1506—2 kg, 30 s
For 2010, 2512: force applied: 3 kg, 30 s
Sample size: 5, zero failure—chips not mounted
Group 8
∆R = 3 ppm/V
Voltage coefficient
Applicable resistors ≥1k
Performed per MIL-STD-202 method 309
Sample size: 5, zero failure—mounted on FR4
Group 9
∆R = 0.015%
High temperature exposure
Performed per MIL-PRF-55342
100 h at +150°C ±5°C
Document No.: 63253
Revision: 04-Jan-2016
For any questions, contact
foil@vpgsensors.com
www.vishayfoilresistors.com
5
TCR Limits
±3 ppm/°C
±4 ppm/°C
±5 ppm/°C
Sample size: 9, zero failure—mounted on FR4
Group 4
Resistance to soldering heat
Sample size: 12, zero failure—mounted on FR4
Group 6
Life
Sample size: 10, zero failure—mounted on FR4
Group 7B
FPGA/CPLD
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