Freescale Semiconductor
Data Sheet: Technical Data
Document Number: MMA16xxNKW
Rev. 5, 09/2012
Xtrinsic MMA16xxNKW
DSI Inertial Sensor
The MMA16xxNKW family, a SafeAssure solution, includes the DSI2.5
compatible overdamped Z-axis satellite accelerometers.
Features
•
•
•
•
•
•
•
±50g to ±312.5g Nominal Full-Scale Range
Selectable 180 Hz, 2-pole, 400 Hz, 4-pole, or 800 Hz, 4-pole LPF
DSI2.5 Compatible with full support of Mandatory Commands
16
μs
internal sample rate, with interpolation to 1 ms
-40°C to 125°C Operating Temperature Range
Pb-Free 16-Pin QFN, 6 by 6 Package
Qualified AECQ100, Revision G, Grade 1 (-40°C to +125°C)
(http://www.aecouncil.com/)
MMA16xxNKW
Bottom View
16-PIN QFN
CASE 2086-01
Typical Applications
• Airbag Front and Side Crash Detection
Top View
TEST7
TEST6
TEST5
12 V
SSA
11 C
REGA
10 TEST4
9 C
REG
5
PCM
6
BUSOUT
7
BUSIN
8
HCAP
ORDERING INFORMATION
Device
MMA1605NKW
MMA1606NKW
MMA1612NKW
MMA1618NKW
MMA1631NKW
MMA1605NKWR2
MMA1606NKWR2
MMA1612NKWR2
MMA1618NKWR2
MMA1631NKWR2
Axis
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Range
50g
62.5g
125g
187g
312g
50g
62.5g
125g
187g
312g
Package
2086-01
2086-01
2086-01
2086-01
2086-01
2086-01
2086-01
2086-01
2086-01
2086-01
Shipping
Tubes
Tubes
Tubes
Tubes
Tubes
Tape & Reel
Tape & Reel
Tape & Reel
Tape & Reel
Tape & Reel
16 15 14 13
TEST2 1
TEST3 2
TEST1 3
BUSRTN 4
17
PIN CONNECTIONS
For user register array programming, please consult your Freescale representative.
© 2010-2012 Freescale Semiconductor, Inc. All rights reserved.
V
SS
Application Diagram
TEST2
TEST1
TEST3
TEST4
TEST5
TEST6
TEST7
C
REG
C
REGA
C4
C5
C3
V
SSA
V
SS
PCM
BUSOUT
HCAP
BUSIN
BUSIN
V
CC
C1
MMA16xxN
V
SS
BUSRTN
BUSRTN
Figure 1. Application Diagram
External Component Recommendations
Ref Des
C1
C3
C4
C5
Type
Ceramic
Ceramic, Tantalum
Ceramic
Ceramic
Description
Purpose
100 pF
≤
C1
≤
1000 pF 10%, 50V, X7R BUSIN Power Supply Decoupling, ESD
1
μF
≤
C3
≤
100
μF,
10%, 50V, X7R
1
μF,
10%, 10V, X7R
1
μF,
10%, 10V, X7R
Reservoir Capacitor for Keep Alive during Signaling
Voltage Regulator Output Capacitor (C
REG
)
Voltage Regulator Output Capacitor (C
REGA
)
Device Orientation
xxxxxxx
xxxxxxx
Z: 0 g
MMA16xxNKW
2
Sensors
Freescale Semiconductor, Inc.
xxxxxxx
xxxxxxx
Z: 0 g
Figure 2. Device Orientation Diagram
xxxxxxx
xxxxxxx
Z: 0 g
xxxxxxx
xxxxxxx
Z: 0 g
EARTH GROUND
Z: +1 g
Z: -1 g
Internal Block Diagram
HCAP
BUSIN
DIGITAL
V
REG
VOLTAGE
REGULATOR
ANALOG
V
REGA
VOLTAGE
REGULATOR
REFERENCE
VOLTAGE
HCAP
C
REG
V
DSI_REF
C
REGA
V
SSA
V
REF
LOW-VOLTAGE
RESET
V
SSB
V
DSI_REF
BUSRTN
V
SS
SERIAL
ENCODER
CONTROL
LOGIC
TEST3
TEST
TEST4
TEST5
TEST6
OSCILLATOR
OTP
FUSE
ARRAY
V
REG
SELF-TEST
INTERFACE
V
REGA
V
REG
SINC Filter
CONTROL
IN
STATUS
OUT
DSP
g-CELL
ΣΔ
CONVERTER
1 – z–D
--------------------------------
-
D
× (
1 – z–1
)
3
IIR
Low-Pass Filter Compensation
PCM Encoder
PCM
Figure 3. Block Diagram
MMA16xxNKW
Sensors
Freescale Semiconductor, Inc.
3
1
Pin Connections
TEST7
TEST6
TEST5
12 V
SSA
11 C
REGA
10 TEST4
9 C
REG
5
PCM
6
VSSB
7
BUSIN
8
H
CAP
Definition
This pin must be left unconnected in the application.
This pin must be grounded in the application.
This pin must be grounded in the application.
This pin is the common return for power and signalling.
This pin provides a 4 MHz PCM signal proportional to the acceleration data for test purposes. The output can be enabled or
disabled via OTP. If unused, this pin must be left unconnected in the application. Reference
Section 3.5.3.6.
This pin must be grounded in the application.
This pin is connected to the DSI positive bus node and provides the power supply and communication to the system master.
An external capacitor must be connected to between this pin and the BUSRTN pin. Reference
Figure 1.
This pin rectifies the supply voltage on the BUSIN pin to create the supply voltage for the device. An external capacitor must
be connected between this pin and the BUSRTN pin to store energy for operation during master communication signalling.
Reference
Figure 1.
This pin is connected to the power supply for the internal digital circuitry. An external capacitor must be connected between
this pin and V
SS
. Reference
Figure 1.
This pin must be grounded in the application.
This pin is connected to the power supply for the internal analog circuitry. An external capacitor must be connected between
this pin and V
SSA
. Reference
Figure 1.
This pin is the power supply return node for analog circuitry.
This pin enables test mode, and provides the SPI programming voltage in test mode. This pin is must be grounded in the
application.
This pin must be grounded in the application.
This pin must be grounded in the application.
This pin is the power supply return node for the digital circuitry.
This pin is the die attach flag, and should be connected to VSS in the application. Reference
Section 5.
The corner pads are internally connected to V
SS
.
16 15 14 13
TEST2 1
TEST3 2
TEST1 3
BUSRTN
4
17
Table 1. Pin Description
Pin
1
2
3
4
5
6
7
Pin
Name
TEST2
TEST3
TEST1
BUSRTN
PCM
VSSB
BUSIN
Formal Name
Test Pin
Test Pin
Test Pin
Ground
PCM
Output
Ground
Supply /
Comm
Hold Capacitor
Digital
Supply
Test Pin
Analog
Supply
Analog GND
Test Pin
Test Pin
Test Pin
Digital GND
Die Attach Pad
Corner Pads
8
HCAP
9
10
11
12
13
14
15
16
17
C
REG
TEST4
C
REGA
VSSA
TEST5
TEST6
TEST7
V
SS
PAD
Corner
Pads
MMA16xxNKW
4
Sensors
Freescale Semiconductor, Inc.
V
SS
Figure 4. Pinout
2
2.1
Electrical Characteristics
Maximum Ratings
Maximum ratings are the extreme limits to which the device can be exposed without permanently damaging it. Do not apply
voltages higher than those shown in the table below.
#
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Rating
Supply Voltage (continuous) (BUSIN, HCAP)
Supply Voltage (pulsed < 400 ms, repetition rate 60s) (BUSIN, HCAP)
C
REG
, C
REGA,
PCM, TEST1, TEST2, TEST3, TEST4, TEST5, TEST6, TEST7
BUSIN, BUSRTN and H
CAP
Current
Maximum duration 1s
Continuous
Powered Shock (six sides, 0.5 ms duration)
Unpowered Shock (six sides, 0.5 ms duration)
Drop Shock (to concrete, tile or steel surface, 10 drops, any orientation)
Electrostatic Discharge (per AECQ100)
HBM (100 pF, 1.5 kΩ)
CDM (R = 0Ω)
MM (200pF, 0Ω)
Temperature Range
Storage
Junction
Thermal Resistance
Symbol
V
CC
V
CC
Value
-0.3 to +30.0
-0.3 to +34.0
-0.3 to +3.0
Unit
V
V
V
mA
mA
g
g
m
V
V
V
°C
°C
°C/W
(3)
(3)
(3)
(3)
(3)
(5)
(5)
(5)
(5)
(5)
(5)
(3)
(3)
(11)
I
IN
I
IN
g
pms
g
shock
h
DROP
V
ESD
V
ESD
V
ESD
T
stg
T
J
θ
JC
400
75
±2000
±2000
1.2
±2000
±500
±200
-40 to +125
-40 to +150
2.5
2.2
Operating Range
The operating ratings are the limits normally expected in the application.
V
L
≤
(V
CC
- V
SS
)
≤
V
H
, T
L
≤
T
A
≤
T
H
,
ΔT ≤
25 K/min, unless otherwise specified.
#
15
16
17
18
19
20
Supply Voltage
V
HCAP
BUSIN
Programming Voltage
Applied to BUSIN (DSI)
Programming Current
BUSIN
Operating Temperature Range
T
A
T
A
Characteristic
Symbol
V
HCAP
V
BUS
V
PP
I
PP
Min
V
L
6.3
-0.3
14.0
85
T
L
-40
-40
Typ
⎯
⎯
⎯
⎯
⎯
⎯
Max
V
H
30
30
30.0
⎯
T
H
+105
+125
Units
V
V
V
mA
°C
°C
(1,12)
(1,12)
(3)
(3)
(1)
(3)
MMA16xxNKW
Sensors
Freescale Semiconductor, Inc.
5
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