S-5724 Series
www.ablicinc.com
© ABLIC Inc., 2012-2013
LOW VOLTAGE OPERATION
HIGH-SPEED BIPOLAR HALL EFFECT LATCH
Rev.1.2
_02
The S-5724 Series, developed by CMOS technology, is a high-accuracy Hall IC that operates at a low voltage with a high-
sensitivity, a high-speed detection and low current consumption.
The output voltage changes when the S-5724 Series detects the intensity level of magnetic flux density and a polarity
change. Using the S-5724 Series with a magnet makes it possible to detect the rotation status in various devices.
High-density mounting is possible by using the small SOT-23-3 or the super-small SNT-4A packages.
Due to its high-accuracy magnetic characteristics, the S-5724 Series can make operation's dispersion in the system
combined with magnet smaller.
Caution
This product is intended to use in general electronic devices such as consumer electronics, office
equipment, and communications devices. Before using the product in medical equipment or
automobile equipment including car audio, keyless entry and engine control unit, contact to ABLIC Inc.
is indispensable.
Features
Pole detection:
Detection logic for magnetism
*1
:
*1
Output form :
Magnetic sensitivity:
*1
Operating cycle (current consumption) :
Power supply voltage range:
Operation temperature range:
Built-in power-down circuit:
Lead-free (Sn 100%), halogen-free
*1.
The option can be selected.
Bipolar latch
V
OUT
= "L" at S pole detection
V
OUT
= "H" at S pole detection
Nch open-drain output, CMOS output
B
OP
= 3.0 mT typ.
t
CYCLE
= 50
s
(I
DD
= 640.0
A)
typ.
t
CYCLE
= 1.25 ms (I
DD
= 26.0
A)
typ.
t
CYCLE
= 6.05 ms (I
DD
= 6.0
A)
typ.
V
DD
= 1.6 V to 3.5 V
Ta =
40°C
to
85°C
Extends battery life (only SNT-4A)
Applications
Digital still camera
Plaything, portable game
Home appliance
Packages
SOT-23-3
SNT-4A
1
LOW VOLTAGE OPERATION HIGH-SPEED BIPOLAR HALL EFFECT LATCH
Rev.1.2
_02
S-5724 Series
Block Diagrams
1.
Nch open-drain output product
1. 1
Product without power-down function
VDD
Sleep / Awake logic
*1
*1
OUT
Chopping
stabilized amplifier
VSS
*1.
Parasitic diode
Figure 1
1. 2
Product with power-down function (SNT-4A)
VDD
*1
Power-down circuit
CE
*1
*1
Sleep / Awake logic
OUT
*1
Chopping
stabilized amplifier
VSS
*1.
Parasitic diode
Figure 2
2
LOW VOLTAGE OPERATION HIGH-SPEED BIPOLAR HALL EFFECT LATCH
Rev.1.2
_02
S-5724 Series
2.
CMOS output product
2. 1
Product without power-down function
VDD
Sleep / Awake logic
*1
*1
OUT
Chopping
stabilized amplifier
*1
VSS
*1.
Parasitic diode
Figure 3
2. 2
Product with power-down function (SNT-4A)
VDD
*1
Power-down circuit
CE
*1
*1
Sleep / Awake logic
*1
OUT
*1
Chopping
stabilized amplifier
VSS
*1.
Parasitic diode
Figure 4
3
LOW VOLTAGE OPERATION HIGH-SPEED BIPOLAR HALL EFFECT LATCH
Rev.1.2
_02
S-5724 Series
Product Name Structure
1.
Product name
x
x
B
x
1
-
xxxx
U
Environmental code
U: Lead-free (Sn 100%), halogen-free
Package name (abbreviation) and packing specifications
*1
M3T1: SOT-23-3, Tape
I4T1:
SNT-4A, Tape
Magnetic sensitivity
1: B
OP
= 3.0 mT typ.
Detection logic for magnetism
L: V
OUT
= "L" at S pole detection
H: V
OUT
= "H" at S pole detection
Pole detection
B: Bipolar latch
Output form
N: Nch open-drain output
C: CMOS output
Operating cycle
C: t
CYCLE
= 6.05 ms typ.
D: t
CYCLE
= 1.25 ms typ.
E: t
CYCLE
= 50
s
typ.
H: t
CYCLE
= 6.05 ms typ.
I:
t
CYCLE
= 1.25 ms typ.
J: t
CYCLE
= 50
s
typ.
S-5724
(Without power-down function)
(Without power-down function)
(Without power-down function)
(With power-down function, SNT-4A)
(With power-down function, SNT-4A)
(With power-down function, SNT-4A)
*1.
Refer to the tape drawing.
2.
Packages
Table 1
Package Name
SOT-23-3
SNT-4A
Dimension
MP003-C-P-SD
PF004-A-P-SD
Package Drawing Codes
Tape
MP003-C-C-SD
PF004-A-C-SD
Reel
MP003-Z-R-SD
PF004-A-R-SD
Land
PF004-A-L-SD
4
LOW VOLTAGE OPERATION HIGH-SPEED BIPOLAR HALL EFFECT LATCH
Rev.1.2
_02
S-5724 Series
3.
Product name list
3. 1
SOT-23-3
Nch open-drain output product
Table 2
Product Name
S-5724CNBL1-M3T1U
Operating Cycle Power-down
(t
CYCLE
)
Function
6.05 ms typ.
Unavailable
Output Form
Pole
Detection
Detection Logic
for Magnetism
Magnetic
Sensitivity
(B
OP
)
3. 1. 1
Nch open-drain
Bipolar latch
output
Nch open-drain
1.25 ms typ.
Unavailable
Bipolar latch
S-5724DNBL1-M3T1U
output
Nch open-drain
Unavailable
Bipolar latch
50
s
typ.
S-5724ENBL1-M3T1U
output
Remark
Please contact our sales office for products other than the above.
3. 1. 2
CMOS output product
Table 3
Product Name
S-5724CCBL1-M3T1U
S-5724DCBL1-M3T1U
S-5724ECBL1-M3T1U
Operating Cycle Power-down
(t
CYCLE
)
Function
6.05 ms typ.
1.25 ms typ.
50
s
typ.
Unavailable
Unavailable
Unavailable
Output Form
CMOS output
CMOS output
CMOS output
Pole
Detection
Bipolar latch
Bipolar latch
Bipolar latch
V
OUT
= "L" at S pole
3.0 mT typ.
detection
V
OUT
= "L" at S pole
3.0 mT typ.
detection
V
OUT
= "L" at S pole
3.0 mT typ.
detection
Detection Logic
for Magnetism
Magnetic
Sensitivity
(B
OP
)
V
OUT
= "L" at S pole
3.0 mT typ.
detection
V
OUT
= "L" at S pole
3.0 mT typ.
detection
V
OUT
= "L" at S pole
3.0 mT typ.
detection
Remark
Please contact our sales office for products other than the above.
3. 2
SNT-4A
CMOS output product
Table 4
Product Name
S-5724HCBL1-I4T1U
S-5724HCBH1-I4T1U
S-5724ICBL1-I4T1U
S-5724ICBH1-I4T1U
S-5724JCBL1-I4T1U
S-5724JCBH1-I4T1U
Operating Cycle Power-down
Function
(t
CYCLE
)
6.05 ms typ.
6.05 ms typ.
1.25 ms typ.
1.25 ms typ.
50
s
typ.
50
s
typ.
Available
Available
Available
Available
Available
Available
Output Form
CMOS output
CMOS output
CMOS output
CMOS output
CMOS output
CMOS output
Pole
Detection
Bipolar latch
Bipolar latch
Bipolar latch
Bipolar latch
Bipolar latch
Bipolar latch
Detection Logic
for Magnetism
V
OUT
= "L" at S pole
detection
V
OUT
= "H" at S pole
detection
V
OUT
= "L" at S pole
detection
V
OUT
= "H" at S pole
detection
V
OUT
= "L" at S pole
detection
V
OUT
= "H" at S pole
detection
Magnetic
Sensitivity
(B
OP
)
3.0 mT typ.
3.0 mT typ.
3.0 mT typ.
3.0 mT typ.
3.0 mT typ.
3.0 mT typ.
3. 2. 1
Remark
Please contact our sales office for products other than the above.
5
NXP MCU
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