The IRS21171SPBF is not recommended for new designs. For new designs, we recommend IRS2117SPbF or IRS25752LPbF
February 18, 2009
IRS211(7,71,8)(S)
SINGLE CHANNEL DRIVER
IC Features
•
•
•
•
•
•
•
•
•
Floating channel designed for bootstrap
operation
Fully operational to +600V
Tolerant to negative transient voltage, dV/dt
immune
Gate drive supply range from 10 V to 20V
Undervoltage lockout
CMOS Schmitt-triggered inputs with pull-down
Output in phase with input
RoHS compliant
IRS2117 and IRS2118 available in PDIP8
Product Summary
Topology
V
OFFSET
V
OUT
I
O+
& I
O-
(typical)
IN voltage
threshold
IRS211(7,8)
IRS21171
Single High Side
600 V
10V-20 V
290 mA & 600 mA
9.5 V & 6 V
2.5 V & 0.8 V
Package Type
SOIC8
PDIP8
IRS2117(1)
IRS2118
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1
© 2008 International Rectifier
The IRS21171SPBF is not recommended for new designs. For new designs, we recommend IRS2117SPbF or IRS25752LPbF
IRS211(7,71,8)(S)
Table of Contents
Description
Qualification Information
Absolute Maximum Ratings
Recommended Operating Conditions
Static Electrical Characteristics
Dynamic Electrical Characteristics
Functional Block Diagram
Input/Output Pin Equivalent Circuit Diagram
Lead Definitions
Lead Assignments
Application Information and Additional Details
Parameter Temperature Trends
Package Details
Tape and Reel Details
Part Marking Information
Ordering Information
Page
3
4
5
5
6
6
7
8
9
9
10
14
23
24
25
26
www.irf.com
2
© 2008 International Rectifier
The IRS21171SPBF is not recommended for new designs. For new designs, we recommend IRS2117SPbF or IRS25752LPbF
IRS211(7,71,8)(S)
Description
The IRS2117, IRS21171, and IRS2118 are high voltage, high speed power MOSFET and IGBT driver.
Proprietary HVIC and latch immune CMOS technologies enable ruggedized monolithic construction. The
logic input is compatible with standard CMOS outputs. The output driver features a high pulse current buffer
stage designed for minimum cross-conduction. The floating channel can be used to drive an N-channel
power MOSFET or IGBT in the high-side or low-side configuration which operates up to 600 V.
www.irf.com
© 2008 International Rectifier
3
The IRS21171SPBF is not recommended for new designs. For new designs, we recommend IRS2117SPbF or IRS25752LPbF
IRS211(7,71,8)(S)
Qualification Information
Qualification Level
†
Moisture Sensitivity Level
Machine Model
ESD
Human Body Model
IC Latch-Up Test
RoHS Compliant
†
††
Industrial
††
(per JEDEC JESD 47)
Comments: This family of ICs has passed JEDEC’s
Industrial qualification. IR’s Consumer qualification level is
granted by extension of the higher Industrial level.
MSL2
†††
260°C
SOIC8
(per IPC/JEDEC J-STD-020C)
Not applicable
PDIP8
(non-surface mount package style)
Class B
(per JEDEC standard EIA/JESD22-A115)
Class 3A
(per EIA/JEDEC standard JESD22-A114)
Class I, Level A
(per JESD78)
Yes
Qualification standards can be found at International Rectifier’s web site
http://www.irf.com/
Higher qualification ratings may be available should the user have such requirements. Please contact
your International Rectifier sales representative for further information.
††† Higher MSL ratings may be available for the specific package types listed here. Please contact your
International Rectifier sales representative for further information.
www.irf.com
© 2008 International Rectifier
4
The IRS21171SPBF is not recommended for new designs. For new designs, we recommend IRS2117SPbF or IRS25752LPbF
IRS211(7,71,8)(S)
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All
voltage parameters are absolute voltages referenced to COM. The thermal resistance and power
dissipation ratings are measured under board mounted and still air conditions.
Symbol
VB
VS
VHO
VCC
VIN
dV
S
/dt
PD
R
θ
JA
TJ
TS
TL
Definition
High-side floating supply voltage
High-side floating supply offset voltage
High-side floating output voltage
Logic supply voltage
Logic input voltage
Allowable offset supply voltage transient (fig.2)
8 lead SOIC
Package power dissipation @ T
A
≤
+25˚C
8 lead PDIP
8 lead SOIC
Thermal Resistance, junction to Ambient
8 lead PDIP
Junction temperature
Storage temperature
Lead Temperature (soldering, 10 seconds)
Min.
-0.3
VB - 25
VS - 0.3
- 0.3
- 0.3
---
---
---
---
-55
---
Max.
625
VB + 0.3
VB + 0.3
25
VCC + 0.3
50
0.625
1.0
200
125
150
150
300
V/ns
W
ºC/W
ºC
V
Units
Recommended Operating Conditions
The input/output logic timing diagram is shown in Fig. 1. For proper operation the device should be used
within the recommended conditions. The VS offset rating is tested with all supplies biased at 15 V
differential.
Symbol
VB
VS
VST
VHO
VCC
VIN
TA
Definition
High-Side floating supply absolute voltage
High-side floating supply offset voltage
Transient High side floating supply offset voltage
High-side floating output voltage
Logic supply voltage
Logic input voltage
Ambient Temperature
Min.
VS + 10
†
-50 (††)
VS
10
0
-40
Max.
VS + 20
600
600
VB
20
VCC
125
ºC
V
Units
† Logic operational for V
S
of -5 V to +600 V. Logic state held for V
S
of -5 V to – V
BS.
†† Operational for transient negative VS of COM - 50 V with a 50 ns pulse width. Guaranteed by design.
Refer to the Application Information section of this datasheet for more details.
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© 2008 International Rectifier
5
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