74LVC273-Q100
Octal D-type flip-flop with reset; positive-edge trigger
Rev. 1 — 16 September 2013
Product data sheet
1. General description
The 74LVC273-Q100 has eight edge-triggered, D-type flip-flops with individual Dn inputs
and Qn outputs. The common clock (CP) and master reset (MR) inputs load and reset
(clear) all flip-flops simultaneously. The state of each Dn input, one set-up time before the
LOW-to-HIGH clock transition, is transferred to the corresponding output (Qn) of the
flip-flop. All outputs are forced LOW independent of clock or data inputs by a LOW voltage
level on the MR input.
The device is useful for applications where the true output only is required and the clock
and master reset are common to all storage elements.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from
40 C
to +85
C
and from
40 C
to +125
C
Wide supply voltage range from 1.2 V to 3.6 V
Inputs accept voltages up to 5.5 V
CMOS low power consumption
Direct interface with TTL levels
Output drive capability 50
transmission lines at +85
C
Complies with JEDEC standard:
JESD8-7A (1.65 V to 1.95 V)
JESD8-5A (2.3 V to 2.7 V)
JESD8-C/JESD36 (2.7 V to 3.6 V)
ESD protection:
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0
)
Nexperia
74LVC273-Q100
Octal D-type flip-flop with reset; positive-edge trigger
3. Ordering information
Table 1.
Ordering information
Package
Temperature range Name
74LVC273D-Q100
40 C
to +125
C
SO20
TSSOP20
Description
plastic small outline package; 20 leads;
body width 7.5 mm
plastic thin shrink small outline package; 20 leads;
body width 4.4 mm
Version
SOT163-1
SOT360-1
SOT764-1
Type number
74LVC273PW-Q100
40 C
to +125
C
74LVC273BQ-Q100
40 C
to +125
C
DHVQFN20 plastic dual in-line compatible thermal enhanced
very thin quad flat package; no leads; 20 terminals;
body 2.5
4.5
0.85 mm
4. Functional diagram
11
1
CP
MR
11
3
4
7
8
13
14
17
18
CP
D0
D1
D2
D3
D4
D5
D6
D7
MR
1
mna763
C1
R
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
2
5
6
9
12
15
16
19
D0
D1
D2
D3
D4
D5
D6
D7
3
4
7
8
13
14
17
18
1D
2
5
6
9
12
15
16
19
mna764
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Fig 1.
Logic symbol
Fig 2.
IEC logic symbol
74LVC273_Q100
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 1 — 16 September 2013
2 of 16
Nexperia
74LVC273-Q100
Octal D-type flip-flop with reset; positive-edge trigger
5. Pinning information
5.1 Pinning
(1) This is not a supply pin. The substrate is attached to this
pad using conductive die attach material. There is no
electrical or mechanical requirement to solder this pad.
However, if it is soldered, the solder land should remain
floating or be connected to GND.
Fig 3.
Pin configuration for SO20 and TSSOP20
Fig 4.
Pin configuration for DHVQFN20
5.2 Pin description
Table 2.
Symbol
MR
CP
D[0:7]
Q[0:7]
GND
V
CC
Pin description
Pin
1
11
3, 4, 7, 8, 13, 14, 17, 18
2, 5, 6, 9, 12, 15, 16, 19
10
20
Description
master reset input (active LOW)
clock input (LOW-to-HIGH; edge-triggered)
data input
flip-flop output
ground (0 V)
supply voltage
74LVC273_Q100
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 1 — 16 September 2013
3 of 16
Nexperia
74LVC273-Q100
Octal D-type flip-flop with reset; positive-edge trigger
6. Functional description
Table 3.
Function table
[1]
Input
MR
Reset (clear)
Load ‘1’
Load ‘0’
[1]
H = HIGH voltage level
L = LOW voltage level
X = don’t care
h = HIGH voltage level one set-up time prior to the LOW-to-HIGH CP transition
l = LOW voltage level one set-up time prior to the LOW-to-HIGH CP transition
= LOW-to-HIGH clock transition
Operating mode
Output
CP
X
Dn
X
h
l
Qn
L
H
L
L
H
H
7. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
V
CC
I
IK
V
I
I
OK
V
O
I
O
I
CC
I
GND
T
stg
P
tot
[1]
[2]
[3]
Parameter
supply voltage
input clamping current
input voltage
output clamping current
output voltage
output current
supply current
ground current
storage temperature
total power dissipation
Conditions
V
I
< 0 V
[1]
Min
0.5
50
0.5
-
[2]
Max
+6.5
-
+6.5
50
V
CC
+ 0.5
50
100
-
+150
500
Unit
V
mA
V
mA
V
mA
mA
mA
C
mW
V
O
> V
CC
or V
O
< 0 V
V
O
= 0 V to V
CC
0.5
-
-
100
65
T
amb
=
40 C
to +125
C
[3]
-
The minimum input voltage ratings may be exceeded if the input current ratings are observed.
The output voltage ratings may be exceeded if the output current ratings are observed.
For SO20 packages: above 70
C
the value of P
tot
derates linearly with 8 mW/K.
For TSSOP20 packages: above 60
C
the value of P
tot
derates linearly with 5.5 mW/K.
For DHVQFN20 packages: above 60
C
the value of P
tot
derates linearly with 4.5 mW/K.
8. Recommended operating conditions
Table 5.
Symbol
V
CC
V
I
V
O
74LVC273_Q100
Recommended operating conditions
Parameter
supply voltage
functional
input voltage
output voltage
Conditions
Min
1.65
1.2
0
0
All information provided in this document is subject to legal disclaimers.
Typ
-
-
-
-
©
Max
3.6
-
5.5
V
CC
Unit
V
V
V
V
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 1 — 16 September 2013
4 of 16
Nexperia
74LVC273-Q100
Octal D-type flip-flop with reset; positive-edge trigger
Table 5.
Symbol
T
amb
t/V
Recommended operating conditions
…continued
Parameter
ambient temperature
input transition rise and fall
rate
Conditions
in free air
V
CC
= 1.65 V to 2.7 V
V
CC
= 2.7 V to 3.6 V
Min
40
0
0
Typ
-
-
-
Max
+125
20
10
Unit
C
ns/V
ns/V
9. Static characteristics
Table 6.
Static characteristics
At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
V
IH
HIGH-level
input voltage
Conditions
V
CC
= 1.2 V
V
CC
= 1.65 V to 1.95 V
V
CC
= 2.3 V to 2.7 V
V
CC
= 2.7 V to 3.6 V
V
IL
LOW-level
input voltage
V
CC
= 1.2 V
V
CC
= 1.65 V to 1.95 V
V
CC
= 2.3 V to 2.7 V
V
CC
= 2.7 V to 3.6 V
V
OH
HIGH-level
output
voltage
V
I
= V
IH
or V
IL
I
O
=
100 A;
V
CC
= 1.65 V to 3.6 V
I
O
=
4
mA; V
CC
= 1.65 V
I
O
=
8
mA; V
CC
= 2.3 V
I
O
=
12
mA; V
CC
= 2.7 V
I
O
=
18
mA; V
CC
= 3.0 V
I
O
=
24
mA; V
CC
= 3.0 V
V
OL
LOW-level
output
voltage
V
I
= V
IH
or V
IL
I
O
= 100
A;
V
CC
= 1.65 V to 3.6 V
I
O
= 4 mA; V
CC
= 1.65 V
I
O
= 8 mA; V
CC
= 2.3 V
I
O
= 12 mA; V
CC
= 2.7 V
I
O
= 24 mA; V
CC
= 3.0 V
I
I
I
CC
I
CC
-
-
-
-
-
-
-
-
-
-
0.1
0.1
5
0.2
0.45
0.6
0.4
0.55
5
10
500
-
-
-
-
-
-
-
-
0.3
0.65
0.8
0.6
0.8
20
40
5000
V
V
V
V
V
A
A
A
V
CC
0.2
1.2
1.8
2.2
2.4
2.2
-
-
-
-
-
-
-
-
-
-
-
-
V
CC
0.3
1.05
1.65
2.05
2.25
2.0
-
-
-
-
-
-
V
V
V
V
V
V
1.08
1.7
2.0
-
-
-
-
40 C
to +85
C
Min
Typ
[1]
-
-
-
-
-
-
-
-
-
-
-
0.12
0.7
0.8
Max
40 C
to +125
C
Min
1.08
1.7
2.0
-
-
-
-
-
-
0.12
0.7
0.8
0.65
V
CC
-
Max
V
V
V
V
V
V
V
Unit
0.65
V
CC
-
0.35
V
CC
-
0.35
V
CC
V
input leakage V
CC
= 3.6 V; V
I
= 5.5 V or GND -
current
supply
current
additional
supply
current
input
capacitance
V
CC
= 3.6 V; V
I
= V
CC
or GND;
I
O
= 0 A
per input pin;
V
CC
= 2.7 V to 3.6 V;
V
I
= V
CC
0.6 V; I
O
= 0 A
V
CC
= 0 V to 3.6 V;
V
I
= GND to V
CC
-
-
-
C
I
5.0
-
-
-
pF
[1]
All typical values are measured at V
CC
= 3.3 V (unless stated otherwise) and T
amb
= 25
C.
All information provided in this document is subject to legal disclaimers.
©
74LVC273_Q100
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 1 — 16 September 2013
5 of 16
嵌入式系统
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