74AC273
OCTAL D-TYPE FLIP FLOP WITH CLEAR
s
s
s
s
s
s
s
s
s
s
HIGH SPEED:
f
MAX
= 250MHz (TYP.) at V
CC
= 5V
LOW POWER DISSIPATION:
I
CC
= 8µA(MAX.) at T
A
=25°C
HIGH NOISE IMMUNITY:
V
NIH
= V
NIL
= 28 % V
CC
(MIN.)
50Ω TRANSMISSION LINE DRIVING
CAPABILITY
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 24mA (MIN)
BALANCED PROPAGATION DELAYS:
t
PLH
≅
t
PHL
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2V to 6V
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 273
IMPROVED LATCH-UP IMMUNITY
DIP
SOP
TSSOP
ORDER CODES
PACKAGE
DIP
SOP
TSSOP
TUBE
74AC273B
74AC273M
DESCRIPTION
The 74AC273 is an advanced high-speed CMOS
OCTAL D-TYPE FLIP FLOP WITH CLEAR
fabricated with sub-micron silicon gate and
double-layer metal wiring C
2
MOS technology.
Information signals applied to D inputs are
PIN CONNECTION AND IEC LOGIC SYMBOLS
O
so
b
te
le
ro
P
uc
d
s)
t(
so
b
-O
transfered to the Q output on the positive going
edge of the clock pulse.
When the CLEAR input is held low, the Q outputs
are held low independentely of the other inputs.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
P
te
le
od
r
s)
t(
uc
T&R
74AC273MTR
74AC273TTR
April 2001
1/11
74AC273
INPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
PIN No
1
2, 5, 6, 9, 12,
15, 16,19
3, 4, 7, 8, 13,
14, 17, 18
11
10
20
SYMBOL
CLEAR
Q0 to Q7
D0 to D7
CLOCK
GND
V
CC
NAME AND FUNCTION
Asyncronous Master Reset
(Active LOW)
Flip-Flop Outputs
Data Inputs
Clock Input (LOW-to-HIGH
Edge Triggered)
Ground (0V)
Positive Supply Voltage
TRUTH TABLE
INPUTS
CLEAR
L
H
H
H
X : Don’t Care
OUTPUT
CLOCK
X
Q
L
L
H
D
X
L
H
X
LOGIC DIAGRAM
O
so
b
te
le
ro
P
uc
d
s)
t(
so
b
-O
P
te
le
Q
n
od
r
s)
t(
uc
FUNCTION
CLEAR
NO CHANGE
This logic diagram has not be used to estimate propagation delays
2/11
74AC273
ABSOLUTE MAXIMUM RATINGS
Symbol
V
CC
V
I
V
O
I
IK
I
OK
I
O
Supply Voltage
DC Input Voltage
DC Output Voltage
DC Input Diode Current
DC Output Diode Current
DC Output Current
Parameter
Value
-0.5 to +7
-0.5 to V
CC
+ 0.5
-0.5 to V
CC
+ 0.5
±
20
±
20
±
50
±
400
-65 to +150
300
Unit
V
V
V
mA
mA
mA
mA
°C
°C
I
CC
or I
GND
DC V
CC
or Ground Current
T
stg
Storage Temperature
T
L
Lead Temperature (10 sec)
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied.
RECOMMENDED OPERATING CONDITIONS
Symbol
V
CC
V
I
V
O
T
op
dt/dv
Supply Voltage
Input Voltage
Output Voltage
Operating Temperature
Input Rise and Fall Time V
CC
= 3.0, 4.5 or 5.5V (note 1)
Parameter
Value
2 to 6
0 to V
CC
1) V
IN
from 30% to 70% of V
CC
O
so
b
te
le
ro
P
uc
d
s)
t(
so
b
-O
te
le
r
P
0 to V
CC
8
-55 to 125
od
s)
t(
uc
Unit
V
V
V
°C
ns/V
3/11
74AC273
DC SPECIFICATIONS
Test Condition
Symbol
Parameter
V
CC
(V)
3.0
4.5
5.5
3.0
4.5
5.5
3.0
4.5
5.5
3.0
4.5
5.5
V
OL
Low Level Output
Voltage
3.0
4.5
5.5
3.0
4.5
5.5
I
I
I
CC
I
OLD
I
OHD
Input Leakage
Current
Quiescent Supply
Current
Dynamic Output
Current (note 1, 2)
5.5
5.5
5.5
V
O
= 0.1 V or
V
CC
-0.1V
V
O
= 0.1 V or
V
CC
-0.1V
I
O
=-50
µA
I
O
=-50
µA
I
O
=-50
µA
I
O
=-12 mA
I
O
=-24 mA
I
O
=-24 mA
I
O
=50
µA
I
O
=50
µA
I
O
=50
µA
I
O
=12 mA
I
O
=24 mA
I
O
=24 mA
V
I
= V
CC
or GND
V
I
= V
CC
or GND
2.9
4.4
5.4
2.56
3.86
4.86
0.002
0.001
0.001
0.1
0.1
0.1
0.36
0.36
0.36
T
A
= 25°C
Min.
2.1
3.15
3.85
Typ.
1.5
2.25
2.75
1.5
2.25
2.75
2.99
4.49
5.49
Max.
Value
-40 to 85°C
Min.
2.1
3.15
3.85
0.9
1.35
1.65
2.9
4.4
5.4
2.46
3.76
4.76
0.1
0.1
0.1
0.9
1.35
1.65
2.9
4.4
5.4
Max.
-55 to 125°C
Min.
2.1
3.15
3.85
0.9
1.35
1.65
Max.
V
Unit
V
IH
High Level Input
Voltage
Low Level Input
Voltage
High Level Output
Voltage
V
IL
V
V
OH
V
OLD
= 1.65 V max
V
OHD
= 3.85 V min
1) Maximum test duration 2ms, one output loaded at time
2) Incident wave switching is guaranteed on transmission lines with impedances as low as 50Ω
O
so
b
te
le
ro
P
uc
d
s)
t(
b
-O
so
te
le
±
0.1
8
r
P
0.44
0.44
0.44
±
1
80
75
-75
od
s)
t(
uc
3.7
4.7
0.1
0.1
0.1
0.5
0.5
0.5
±
1
160
50
-50
µA
µA
mA
mA
V
2.4
V
4/11
74AC273
AC ELECTRICAL CHARACTERISTICS
(C
L
= 50 pF, R
L
= 500
Ω,
Input t
r
= t
f
= 3ns)
Test Condition
Symbol
Parameter
V
CC
(V)
3.3
(*)
5.0
(**)
3.3
(*)
5.0
(**)
3.3
(*)
5.0
(**)
3.3
(*)
5.0
(**)
3.3
(*)
5.0
(**)
3.3
(*)
5.0
(**)
3.3
(*)
5.0
(**)
3.3
(*)
5.0
(**)
T
A
= 25°C
Min.
4.0
3.0
4.0
3.0
5.5
4.0
5.5
4.0
5.5
4.0
1.5
1.5
4.0
3.0
90
140
Typ.
7.5
5.0
8.5
6.5
Max.
12.5
9.0
13.0
10.0
Value
-40 to 85°C
Min.
3.0
2.5
3.0
2.5
6.0
4.5
6.0
4.5
6.0
4.5
1.5
1.5
Max.
14.0
10.0
14.0
11.0
-55 to 125°C
Min.
3.0
2.5
3.0
2.5
6.0
4.5
6.0
4.5
6.0
Max.
16.0
11.0
16.0
12.0
ns
ns
Unit
t
PLH
t
PHL
Propagation Delay
Time
CLOCK to Q
t
PHL
Propagation Delay
Time
CLEAR to Q
t
W
CLEAR Pulse
Width, LOW
t
W
t
s
CLOCK Pulse
Width
Setup Time D to
CLOCK, HIGH or
LOW
Hold Time D to
CLOCK, HIGH or
LOW
Recovery Time
CLEAR to CLOCK
Maximum Clock
Frequency
ns
ns
t
h
t
REM
f
MAX
(*) Voltage range is 3.3V
±
0.3V
(**) Voltage range is 5.0V
±
0.5V
CAPACITIVE CHARACTERISTICS
Test Condition
Symbol
Parameter
C
IN
C
PD
Input Capacitance
1) C
PD
is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I
CC(opr)
= C
PD
x V
CC
x f
IN
+ I
CC
/8 (per circuit)
O
so
b
te
le
Power Dissipation
Capacitance (note
1)
ro
P
uc
d
V
CC
(V)
5.0
5.0
s)
t(
so
b
-O
Min.
4
32
250
P
te
le
3.0
75
125
Value
4.5
od
r
ct
u
1.5
1.5
4.5
3.0
75
125
4.5
s)
(
ns
ns
ns
MHz
T
A
= 25°C
Typ.
Max.
-40 to 85°C
Min.
Max.
-55 to 125°C
Min.
Max.
Unit
pF
pF
f
IN
= 10MHz
5/11
单片机
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