The NXP ASC3101 and ASC3112 AISG transceiver products are optimized AISG controller solutions
for tower mounted devices requiring AISG communication and control. These products combine
one or two programmable DSP based AISG modems and an ARM
®
Cortex™-M3 processor with
embedded flash program memory and a broad range of peripheral interfaces to control the tower
mounted devices.
Key features
`
Low component count and small application size
`
94 MHz ARM
®
Cortex™-M3
`
Single or dual AISG modem
`
Receiver band-pass filter and transmitter emission profile
compliant with AISG standard
`
Supports 2.176 MHz, 4.352 MHz and 6.528 MHz carrier
frequencies
`
Embedded flash program memory for ARM CPU
`
Broad range of peripheral interfaces for TMA and RET
systems
`
Receiver sensitivity better than AISG standard to
compensate for external circuit attenuation
`
Three programmable receiver sensitivity levels; standard,
high and ultra high
`
Programmable transmitter cable power of 0 dBm to +10 dBm
`
Supports 9.6 kbps and 38.4 kbps AISG OOK data rates
`
Integrated 50
Ω
termination for receiver and transmitter
`
5 V tolerant IO
`
1.8 V and 3.3 V power supply
`
20 x 20 mm HLQFP-144 pin package
Key benefits
`
Combines two AISG transceivers and an ARM CPU with flash
memory in single package
`
Highly integrated solution:
- Cost effective
- Low component count
- Small size
- Low power
Interfaces supported
`
I
2
C master/slave
`
SPI master/slave for three slave devices
`
Timer with four capture inputs and four match outputs
`
PWM for motor control
`
8-channel 10-bit ADC
`
8-channel 10-bit DAC
`
44 GPIOs
`
Standard UART-550 and RS-485 support
`
Real time clock
Description
The combination of AISG transceiver functionality with a
powerful 94 MHz ARM
®
Cortex™-M3 processor is a highly
optimized and cost-effective solution for tower mounted
devices requiring multiple AISG transceivers and a CPU. The
products include programmable DSP based AISG transceivers,
SRAM/ROM and flash memory for the ARM CPU and a broad
range of peripheral interfaces. The products conform to the
AISG standard and are optimized for controlling tower
mounted devices such as tower mounted amplifiers and
remote electrical tilt antennas.
The innovative DSP-based programmable AISG transceiver
can be either factory programmed, field-updated, or settings
can be changed on-the-fly by the embedded CPU.
In addition to the standard AISG carrier frequency of 2.176 MHz,
the products also support 4.352 MHz, and 6.528 MHz carrier
frequencies to support channel multiplexing of two or three
carriers on the same RF feeder cable.
NXP provides a full software reference stack with device
drivers and AISG protocol software stack.
Block diagram of ASC3101, ASC3112
Up to 256 kB of Integrated flash and 16 kB of SRAM are
available to run the application software. SPI-based serial flash
can be added to externally extend the program memory.
The products include integrated ADC, DAC, Real Time Clock
with 32 kHz crystal and 44 customizable GPIOs to meet any
specific application requirements.
The receiver can be programmed to three different sensitivity
levels depending on the application requirements. The
receiver band-pass filter is AISG compliant and guarantees
excellent performance at low signal strength even with
presence of co-channels.
Development platform
ASC3101 and ASC3112 are shipped with a full Software
Development Kit (SDK), which includes a reference AISG
stack for basic control and power management. The SDK
allows tower mounted device manufacturers to maximize
interoperability in compliance with the AISG standard and to
minimize the total component-count.
AISG OOK signal
AISG OOK signal
AISG RS-485 signal
UART console
Stepper motor
control
Debugger
AISG modem 0
AISG modem 1
UART1 (RS-485)
UART0 (RS-232)
PWM
JTAG/SW0
ARM Cortex-M3
CPU
ADC
DAC
Sensors
For RET/TMA
I2C devices
I2C devices
Flash or SPI devices
LED, Alarms
AISG modem 1 is only for ASC3112
Up to 256 KB ash
and 16 KB SRAM
I2C0
I2C1
SPI
DMA, NVIC
RTC, Timger,
Watchdog
GPIOs
Block diagram of typical RET system
RF to ANT
UART
ASC3101/
ASC3112
range sense for calibration
GPIO/Analog
PWM
RET
TRANSCEIVER
RS-485
RS-485
(optional)
ANT
STEPPER
MOTOR
STEPPER
MOTOR
CONTROL
STEPPER
MOTOR
STEPPER
MOTOR
MECHANICAL
DRIVE
MECHANICAL
DRIVE
MECHANICAL
DRIVE
tilt
RET
AISG+DC
AISG
(OOK)
azimuth
smart
bias T
beam
width
RF feeder
cable
RF
SEPARATOR
DC
SEPARATOR
DC-DC
CONV
supplies
for system
DC supply
RF + AISG (OOK) + DC
Block diagram of an optimized TMA system
ANT 1
ANT 2
TMA
TRANSCEIVER
RS-485
optional
SERIAL
FLASH
sytem debug
and control
I2C
SPI
UART
FILTER
FILTER
GPIO
ASC3112
GPIO
ARM® Cortex™-M3
FILTER
FILTER
LNA
AISG
MODEM 1
AISG (OOK)
FILTER
DC
AISG (OOK)
+
RF
DC
DC
SEPARATOR
SEPARATOR
RF + AISG (OOK) + DC
BTS 1
Power
Supply Unit
AISG
MODEM 2
AISG (OOK)
FILTER
AISG (OOK)
+
RF
DC
DC
SEPARATOR
SEPARATOR
RF + AISG (OOK) + DC
BTS 2
LNA
TMA implementation with reduction of external switch or multiplexer for RF port selection for OOK data. This can also help to simplify the installation procedure.
Part numbers
Part number
ASC3101
ASC3112
Description
Single modem AISG Transceiver with embedded ARM
®
Cortex™-M3 processor and 128 kbyte of embedded flash program memory
Dual modem AISG Transceiver with embedded ARM
®
Cortex™-M3 processor and 256 kbyte of embedded flash program memory
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