STP15NK50Z/FP - STB15NK50Z
STB15NK50Z-1 - STW15NK50Z
N-channel 500V - 0.30Ω - 14A TO-220/FP/D
2
PAK/I
2
PAK/TO-247
Zener-protected SuperMESH™ Power MOSFET
General features
Type
STP15NK50Z
STP15NK50ZFP
STB15NK50Z
STB15NK50Z-1
STW15NK50Z
■
■
■
■
■
V
DSS
500V
500V
500V
500V
500V
R
DS(on)
<0.34Ω
<0.34Ω
<0.34Ω
<0.34Ω
<0.34Ω
I
D
14A
14A
14A
14A
14A
Pw
160 W
1
3
2
3
1
2
40 W
160W
160W
160W
TO-220
TO-220FP
TO-247
3
12
Extremely high dv/dt capability
100% avalanche tested
Gate charge minimized
Very low intrinsic capacitances
Very good manufacturing repeatibility
1
3
I
2
PAK
D
2
PAK
Internal schematic diagram
Description
The SuperMESH™ series is obtained through an
extreme optimization of ST’s well established
strip-based PowerMESH™ layout. In addition to
pushing on-resistance significantly down, special
care is taken to ensure a very good dv/dt
capability for the most demanding applications.
Such series complements ST full range of high
voltage MOSFETs including revolutionary
MDmesh™ products.
Applications
■
Switching application
Order codes
Part number
STP15NK50Z
STP15NK50ZFP
STB15NK50ZT4
STB15NK50Z
STB15NK50Z-1
STW15NK50Z
January 2007
Marking
P15NK50Z
P15NK50ZFP
B15NK50Z
B15NK50Z
B15NK50Z
W15NK50Z
Rev 4
Package
TO-220
TO-220FP
D
2
PAK
D
2
PAK
I
2
PAK
TO-247
Packaging
Tube
Tube
Tape & reel
Tube
Tube
Tube
1/19
www.st.com
19
Contents
STP15NK50Z - STP15NK50ZFP - STB15NK50Z - STB15NK50Z-1 - STW15NK50Z
Contents
1
2
Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.1
Electrical characteristics (curves)
............................. 7
3
4
5
Test circuit
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2/19
STP15NK50Z - STP15NK50ZFP - STB15NK50Z - STB15NK50Z-1 - STW15NK50Z Electrical ratings
1
Electrical ratings
Table 1.
Absolute maximum ratings
Value
Symbol
Parameter
TO-220/D
2
PAK
I
2
PAK/TO-247
V
DS
V
DGR
V
GS
I
D
I
D
I
DM(2)
P
TOT
Drain-source voltage (V
GS
= 0)
Drain-gate voltage (R
GS
= 20KΩ)
Gate-source voltage
Drain current (continuous) at T
C
=
25°C
Drain current (continuous) at
T
C
=100°C
Drain current (pulsed)
Total dissipation at T
C
= 25°C
Derating Factor
I
GS
dv/dt
(3)
V
ISO
T
J
T
stg
Gate-source current (DC)
14
8.8
56
160
1.28
± 20
4000
4.5
--
2500
500
500
± 30
14
(1)
8.8
(1)
56
(1)
40
0.32
Unit
TO-220FP
V
V
V
A
A
A
W
W/°C
mA
KV
V/ns
V
Vesd(G-S) G-S ESD (HBM C=100pF, R=1.5kΩ)
Peak diode recovery voltage slope
Insulation withstand voltage (RMS)
from all three leads to external heat
sink (t=1s;T
C
=25°C)
Operating junction temperature
Storage temperature
-50 to 150°C
°C
1. Limited only by maximum temperature allowed
2. Pulse width limited by safe operating area
3.
I
SD
≤
14A, di/dt
≤
200A/µs,V
DD
≤
V
(BR)DSS
, T
j
≤
T
JMAX
Table 2.
Thermal data
Value
Symbol
Parameter
TO-220
I
2
PAK
D
2
PAK
Unit
TO-220FP
TO-247
R
thj-case
Thermal resistance junction-case
Max
0.78
60
3.1
0.78
°C/W
°C/W
Rthj-pcb
(1)
Thermal resistance junction-pcb max
3/19
Electrical ratings STP15NK50Z - STP15NK50ZFP - STB15NK50Z - STB15NK50Z-1 - STW15NK50Z
Table 2.
R
thj-a
T
l
Thermal data
Thermal resistance junction-ambient
max
Maximum lead temperature for
soldering purpose
62.5
300
50
°C/W
°C
1. When mounted on minimum foot-print
Table 3.
Symbol
I
AR
E
AS
Avalanche characteristics
Parameter
Avalanche current, repetitive or not-repetitive
(pulse width limited by Tj Max)
Single pulse avalanche energy
(starting Tj=25°C, Id=I
AR
, V
DD
=50V)
Value
14
300
Unit
A
mJ
Table 4.
Symbol
Gate-source zener diode
Parameter
Test conditions
Igs=±1mA
(Open Drain)
Min.
30
Typ.
Max.
Unit
V
BV
GSO(1)
Gate-source breakdown voltage
1. The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s
ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be
applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and
cost-effective intervention to protect the device’s integrity. These integrated Zener diodes thus avoid the
usage of external components.
4/19
STP15NK50Z - STP15NK50ZFP - STB15NK50Z - STB15NK50Z-1 - STW15NK50Z Electrical charac-
2
Electrical characteristics
(T
CASE
=25°C unless otherwise specified)
Table 5.
Symbol
V
(BR)DSS
I
DSS
I
GSS
V
GS(th)
R
DS(on)
On/off states
Parameter
Drain-source breakdown
voltage
Zero gate voltage drain
current (V
GS
= 0)
Gate body leakage current
(V
DS
= 0)
Gate threshold voltage
Static drain-source on
resistance
Test conditions
I
D
= 1mA, V
GS
= 0
V
DS
= Max rating,
V
DS
= Max rating @125°C
V
GS
= ±20V
V
DS
= V
GS
, I
D
= 100µA
V
GS
= 10V, I
D
= 7A
3
3.75
0.30
Min.
500
1
50
±
10
Typ.
Max.
Unit
V
µA
µA
µA
V
Ω
4.5
0.34
Table 6.
Symbol
g
fs (1)
C
iss
C
oss
C
rss
Dynamic
Parameter
Forward transconductance
Input capacitance
Output capacitance
Reverse transfer
capacitance
Test conditions
V
DS
=15V, I
D
= 7A
Min.
Typ.
12
2260
264
64
150
76
15
40
20
23
62
15
106
Max.
Unit
S
pF
pF
pF
pF
nC
nC
nC
ns
ns
ns
ns
V
DS
=25V, f=1 MHz, V
GS
=0
C
oss eq(2).
Equivalent output
capacitance
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
Total gate charge
Gate-source charge
Gate-drain charge
Turn-on delay time
Rise time
Turn-off delay time
Fall time
V
GS
=0, V
DS
=0V to 400V
V
DD
=400V, I
D
= 14A
V
GS
=10V
V
DD
=250 V, I
D
=7A,
R
G
=4.7Ω, V
GS
=10V
(see Figure 18)
1. Pulsed: pulse duration=300µs, duty cycle 1.5%
2. C
oss eq.
is defined as a constant equivalent capacitance giving the same charging time as C
oss
when V
DS
inceases from 0 to 80% V
DSS
5/19
PCB设计
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