End of Life. Last Available Purchase Date is 31-Dec-2014
SiP21106, SiP21107, SiP21108
Vishay Siliconix
150-mA Low Noise, Low Dropout Regulator
DESCRIPTION
The SiP21106 BiCMOS 150 mA low noise LDO voltage
regulators are the perfect choice for low battery operated low
powered applications. An ultra low ground current and low
dropout voltage of 135 mV at 150 mA load helps to extend
battery life for portable electronics. Systems requiring a quiet
voltage source, such as RF applications, will benefit from the
SiP21106 low output noise.
The SiP21107 do not require a noise bypass capacitor and
provides an error flag pin (POK or Power OK). POK output
requires an external pull-up resistor and goes low when the
supply has not come up to voltage.
The SiP21108 output is adjusted with an external resistor
network.
The SiP21106, SiP21107, SiP21108 regulators allow stable
operation with very small ceramic output capacitors,
reducing board space and component cost. They are
designed to maintain regulation while delivering 330 mA
peak current upon turn-on. During start-up, an active
pull-down circuit improves the output transient response and
regulation. In shutdown mode, the output automatically
discharges to ground through a 100
NMOS.
The SiP21106, SiP21107, SiP21108 are available in
TSOT23-5L a super thin lead (Pb)-free TSC75-6L and
SC70-5L packages for operation over the industrial operation
range (- 40 °C to 85 °C).
FEATURES
• SC70-5L (2.1 mm x 2.1 mm x 0.95 mm)
• TSOT23-5L (3.05 mm x 2.85 mm x 1.0 mm)
• TSC75-6L package (1.6 mm x 1.6 mm
RoHS
COMPLIANT
x 0.55 mm), TSOT23-5L and SC70-5L
Package Options
• 1.0 % output voltage accuracy at 25 °C
• Low dropout voltage: 135 mV at 150 mA
• SiP21106 low noise: 60 µV
(rms)
(10 Hz to 100 kHz
bandwidth) with 10 nF over full load range
• 35 µA (typical) ground current at 1 mA load
• 1 µA maximum shutdown current at 85 °C
• Output auto discharge at shutdown mode
• Built-in short circuit (330 mA typical) and thermal
protection (160 °C typical)
• SiP21108 adjustable output voltage
• SiP21107 POK Error Flag
• - 40 °C to + 125 °C junction temperature range for
operation
• Uses low ESR ceramic capacitors
• Fixed voltage output 1.2 V to 5 V in 50 mV steps
• Compliant to RoHS Directive 2002/95/EC
APPLICATIONS
•
•
•
•
•
•
Cellular phones, wireless handsets
PDAs
MP3 players
Digital cameras
Pagers
Wireless modem
•
Noise-sensitive electronic systems
TYPICAL APPLICATION CIRCUIT
V
IN
C
IN
= 1 µF
1
V
IN
V
OUT
5
V
OUT
C
OUT
= 1 µF
EN
EN
BP
C
Bypass
= 10 nF
2
GND
SiP21106
GND
SiP21106
BP
4
C
Bypass
= 10 nF
V
IN
C
IN
= 1 µF
V
IN
NC
EN
3
EN
V
OUT
V
OUT
C
OUT
= 1 µF
TSOT23-5L/SC70-5LPackage
TSC75-6L Package
Document Number: 74442
S09-1047-Rev. G, 08-Jun-09
www.vishay.com
1
End of Life. Last Available Purchase Date is 31-Dec-2014
SiP21106, SiP21107, SiP21108
Vishay Siliconix
TYPICAL APPLICATION CIRCUIT
1
C
IN
= 1 µF
2
V
IN
V
OUT
5
V
OUT
C
OUT
= 1 µF
EN
EN
POK
POK
GND
SiP21107
GND
SiP21107
4
POK
V
IN
C
IN
= 1 µF
V
IN
NC
3
EN
POK
V
OUT
V
OUT
C
OUT
=1 µF
TSOT23-5L/SC70-5LPackage
TSC75L-6 Package
V
IN
C
IN
= 1
µF
1
V
IN
V
OUT
5
C
OUT
= 1
µF
V
OUT
EN
EN
Adj
2
GND
SiP21108
GND
SiP21108
NC
EN
3
EN
A
d
j
4
V
IN
C
IN
= 1
µF
V
IN
V
OUT
V
OUT
C
OUT
= 1
µF
TSOT23-5L/SC70-5L Package
TSC75-6L Package
ABSOLUTE MAXIMUM RATINGS
Parameter
Input Voltage, V
IN
to GND
V
EN
(See Detailed Description)
Output Current (I
OUT
)
Output Voltage (V
OUT
)
TSC75-6L
Package Power Dissipation (P
D
)
a
Package Thermal Resistance (
JA
)
b
Maximum Junction Temperature, T
J(max)
Storage Temperature, T
STG
Lead Temperature, T
Lc
420
131
Limit
- 0.3 to 6.5
- 0.3 to 6.5
Short Circuit Protected
- 0.3 to V
IN
+ 0.3
TSOT23-5L
305
180
125
- 65 to 150
260
°C
SC70-5L
187
294
mW
°C/W
V
Unit
V
Notes:
a. Derate 7.6 mW/°C for TSC75-6L package, 5.5 mW/°C for TSOT23-5L and 3.4 mW/°C for SC70-5L package above T
A
= 70 °C.
b. Device mounted with all leads soldered or welded to multilayer 1S2P PC board.
c. Soldering for 5 s.
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating/conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING RANGE
Parameter
Input Voltage, V
IN
Operating Ambient Temperature T
A
Limit
2.2 to 6
- 40 to 85
Unit
V
°C
www.vishay.com
2
Document Number: 74442
S09-1047-Rev. G, 08-Jun-09
End of Life. Last Available Purchase Date is 31-Dec-2014
SiP21106, SiP21107, SiP21108
Vishay Siliconix
SPECIFICATIONS
Test Conditions Unless Specified
V
IN
= V
OUT(nom)
+ 1.0 V = V
EN
I
OUT
= 1 mA, C
IN
= 1 µF, C
OUT
= 1 µF
- 40 °C < T
A
< 85 °C for full
Parameter
Input Voltage Range
Symbol
V
IN
Temp.
a
Min.
b
Full
2.2
- 1.0
- 2.5
- 1.5
-4
Room
Full
Room
Full
Full
Full
Typ.
c
Max.
b
6
1.0
2.5
1.5
4
Unit
V
I
OUT
= 1 mA
Output Voltage Accuracy
V
OUT
SiP21106/7 (1.2 V) I
OUT
= 1 mA
Feedback Voltage
(SiP21108 Version only)
Line Regulation
V
Adj
LNR
V
OUT
2.6 V,
I
OUT
: 1 mA to 150 mA
V
OUT
<
2.6 V,
I
OUT
: 1 mA to 150 mA
I
OUT
= 1 mA
Ground Pin Current
e
I
GND
I
OUT
= 150 mA
Shutdown Supply Current
I
CC(off)
V
EN
= 0 V
SiP21106
V
OUT(nom)
= 2.8 V, BW = 10 Hz to 100 kHz,
1 mA < I
OUT
< 150 mA, C
BP
= 0.01 µF
SiP21107/8
V
OUT(nom)
= 2.8 V, BW = 10 Hz to 100 kHz,
1 mA < I
OUT
< 150 mA
EN to V
OUT
delay; I
OUT
= 1 mA
SiP21106, C
BP
= 0.01 µF
I
OUT
= 10 mA
Ripple Rejection
PSRR
SiP21107/8
SiP21106, C
BP
= 0 µF
I
OUT
= 10 mA
Output Current Limit
Auto Discharge Resistance
I
O_LIM
R
DIS
V
OUT
= 0 V
EN = 0 V, V
OUT
= 1 V
For V
OUT
< 2.2 V, EN = 0 V, V
OUT
= 1 V
I
OUT
= 50 mA
Dropout Voltage
d
(2.2 V
V
OUT(nom)
< 2.6 V)
V
DO
I
OUT
= 100 mA
I
OUT
= 150 mA
I
OUT
= 50 mA
Dropout Voltage
(V
OUT(nom)
2.6
V)
V
DO
I
OUT
= 100 mA
I
OUT
= 150 mA
EN Pin Input Voltage
EN Pin Input Current
V
ENH
V
ENL
I
EN
High = Regulator On (Rising)
Low = Regulator Off (Falling)
f = 1 kHz
f = 10 kHz
f = 100 kHz
f = 1 kHz
f = 10 kHz
f = 100 kHz
%
Room 1.188
1.170
- 0.2
1.2
0.006
0.003
0.005
35
39
0.02
60
1.212
1.230
0.2
0.006
V
%/V
Room
Room
Room
Full
Room
Full
Full
Room
Load Regulation
LDR
%/mA
0.009
75
85
75
85
1
µA
µA
Output Noise Voltage
f
(RMS)
e
N
µV
Room
350
70
Room
Room
Room
Room
Room
Room
Room
Room
Room
Room
Full
Room
Full
Room
Full
Room
Full
Room
Full
Room
Full
Full
Full
Room
0.009
1.2
0.4
170
75
56
40
72
53
38
330
100
120
45
55
90
106
135
160
45
55
90
106
135
160
180
220
V
µA
250
300
mV
600
mA
dB
µs
Output Voltage Turn-On Time
t
on
Document Number: 74442
S09-1047-Rev. G, 08-Jun-09
www.vishay.com
3
End of Life. Last Available Purchase Date is 31-Dec-2014
SiP21106, SiP21107, SiP21108
Vishay Siliconix
SPECIFICATIONS
Test Conditions Unless Specified
V
IN
= V
OUT(nom)
+ 1.0 V
I
OUT
= 1 mA, C
IN
= 1 µF, C
OUT
= 1 µF
- 40 °C < T
A
< 85 °C for full
Parameter
Thermal Shutdown Junction Temperature
Thermal Hysteresis
Error Flag Section (SiP21107 Version only)
POK(OFF) Leakage
POK(ON) Voltage
Symbol
T
J(S/D)
T
HYST
I
OFF
V
POKL
Temp.
a
Min.
b
Typ.
c
Max.
b
Room
Room
160
20
1
0.4
90
Full
91
Room
1.5
40
93
96
Unit
°C
R
PU
to V
OUT
or V
IN
EN = 0 V, I
POK
= 0.5 mA
V
OUT
rising, POK goes high
V
OUT(nom)
2.2 V, I
OUT
= 1 mA
V
OUT
rising, POK goes high
V
OUT(nom)
<
2.2 V, I
OUT
= 1 mA
V
IN
falling, I
OUT
= 1 mA, POK goes low
V
OUT
to POK delay, I
OUT
= 1 mA
Full
Full
µA
V
POK Threshold
g
V
POKLH
%
POK Hysteresis
POK Voltage Delay Time
V
HYST
T
P_Delay
µs
Notes:
a. Room = 25 °C, Full = - 40 to 85 °C. Derate 7.6 mW/°C for TSC75 and 5.5 mW/°C for SOT23 above T
A
= 70 °C.
b. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. Dropout voltage is defined as the input-to-output differential voltage at which the output voltage drops 2 % below its nominal
value with constant load. For outputs = 2.2 V, dropout voltage is not applicable due to 2.2 V minimum input voltage requirement.
e. Ground current is specified for normal operation as well as “drop-out” operation.
f. Output noise is proportional to output voltage. Use formula e
N
= 60 µV(rms)*V
OUT
/2.8 V.
g. POK threshold percentage is calculated by V
IN
/V
OUT
x 100 %. The POK is measured with a differential voltage across V
IN
and V
OUT
until POK
turn on (low threshold) or off (high threshold). For V
OUT
less than 2.2 V, POK is guaranteed functionality only.
TIMING WAVEFORMS
V
IN
V
EN
t
r
0
V
1
µs
t
ON
V
NOM
0.95
V
NOM
V
OUT
Figure 1.
www.vishay.com
4
Document Number: 74442
S09-1047-Rev. G, 08-Jun-09
End of Life. Last Available Purchase Date is 31-Dec-2014
SiP21106, SiP21107, SiP21108
Vishay Siliconix
PIN CONFIGURATION
EN
BP/Adj/POK
BP/Adj/POK
6
GND
NC
NC
5
1
2
3
GND
EN
V
IN
TOP
VIEW
V
OUT
V
OUT
4
V
IN
TSC75-6L Package (1.6 mm x 1.6 mm x 0.55 mm)
BOTTOM
VIEW
V
IN
GND
EN
1
2
3
5
V
OUT
V
OUT
5
1
2
V
IN
GND
EN
4
BP/Adj/POK
BP/Adj/POK
4
3
TOP VIEW
TSOT23-5L/SC70-5LPackage
Figure 2.
BOTTOM VIEW
PIN DESCRIPTION
Pin Number
TSC75-6L
Pin Number
TSOT23-5L/
SC70-5L
3
2
1
5
-
Name
Function
By applying less than 0.4 V to this pin, the device will be turned off. Connect this pin to
V
IN
if unused. Do not leave floating.
Ground pin. For better thermal capability, directly connected to large ground plane.
Input supply pin. Bypass this pin with a 1 µF ceramic or tantalum capacitor to ground.
Output voltage. Connect C
OUT
between this pin and ground.
No Connection.
- BP (SiP21106): Noise bypass pin. For low noise applications, a 10 nF ceramic capacitor
should be connected from this pin to ground.
- Adj (SiP21108): Adjust input pin. Connect feedback resistors to program the output
voltage for trim value of 1.2005 V.
- POK (SiP21107): Power OK (error flag) pin. Open-drain output, which requires
connecting a pull-up resistor to V
IN
or V
OUT
. POK pin is actively high to indicate an output
normal operation condition on regulator and goes low to indicate under-voltage fault
卡巴斯基的安全研究人员称其发现了如何攻击Intel微处理器的远程攻击代码，据传，这一代码可以通过TCP/IP包和JavaScript代码到达用户系统。 目前受影响的系统包括Windows XP，Vista，Windows Server 2003，Windows Server 2008，Linux甚至是BSD和Mac。但所幸大多数错误可以由Intel和BIOS厂商联合进行修复。 卡...[详细]
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