IS31LT3910
UNIVERSAL HIGH BRIGHTNESS LED DRIVER
WITH TEMPERATURE COMPENSATION
May 2014
GENERAL DESCRIPTION
The IS31LT3910 is a peak current mode control LED
driver IC. The IS31LT3910 operates in constant off-
time mode. It allows efficient operation of High
Brightness (HB) LEDs with voltage sources ranging
from 8VDC to 450DC or 110VAC/220VAC. The
IS31LT3910 includes a PWM dimming input that can
accept an external control signal with a duty ratio of
0 - 100% and a frequency of up to a few kilohertz. It
also includes a 0 - 240mV linear dimming input
which can be used both for linear dimming and
temperature compensation of the LED current.
The IS31LT3910 is ideally suited for buck LED
drivers. Since the IS31LT3910 operates in peak
current mode control, the controller achieves good
output current regulation without the need for any
loop compensation. It achieves good PWM dimming
response because the response time is limited only
by the rate of rise and fall of the inductor current,
enabling very fast rise and fall time.
FEATURES
Wide input range from 8VDC to 450DC or
110VAC/220 VAC
Temperature compensation to regulate LED
current
Application from a few mA to more than 1A
output
Constant off-time operation
Linear and PWM dimming capability
Switch mode controller for single switch LED
drivers
Requires few external components for operation
APPLICATIONS
DC/DC or AC/DC LED driver applications
General purpose constant current source
Signal and decorative LED lighting
backlighting LED driver
TYPICAL APPLICATION CIRCUIT
V
INDC
8V ~ 450V
R
IN
D
1
NTC
C
1
L
1
8
7
C
OFF
VCC
TOFF
GATE
5
M
1
C
IN
2
1
R
1
IS31LT3910
PWMD
VREF
CS
6
3
LD
GND
4
R
CS
C
2
Figure 1
Typical Application Circuit
Integrated Silicon Solution, Inc. – www.issi.com
Rev. B, 05/12/2014
1
IS31LT3910
PIN CONFIGURATIONS
Package
Pin Configurations (Top View)
SOP-8
PIN DESCRIPTION
No.
1
2
Pin
VREF
PWMD
Description
This pin provides reference a voltage of 1.2V, no bypass
capacitor is needed.
This is the PWM dimming input of the IC. When this pin is pulled
to GND, the gate driver is turned off. When the pin is pulled high,
the gate driver operates normally.
This pin is the linear dimming input and sets the current sense
threshold as long as the voltage at the pin is less than 240mV
(Typ.). It can also used as temperature compensation threshold
voltage.
Ground return for all internal circuitry. This pin must be electrically
connected to ground.
This pin is the output gate driver for an external N-channel power
MOSFET.
This pin is the current sense pin used to sense the MOSFET
current by means of an external sense resistor. When this pin
exceeds the lower of either the internal 240mV or the voltage at
the LD pin, the gate output goes low.
This pin sets the off time of the power MOSFET. If left floating
then the off time will be 510ns. When a capacitor is connected
between TOFF and GND, the off time is increased.
This pin is the input of an 8V ~ 450V voltage supply through a
resistor, clamped at 7.1V internally, it must be bypassed with a
capacitor to GND.
3
LD
4
5
GND
GATE
6
CS
7
TOFF
8
VIN
Integrated Silicon Solution, Inc. – www.issi.com
Rev. B, 05/12/2014
2
IS31LT3910
ORDERING INFORMATION
Industrial Rage: -40°C to +85°C
Order Part No.
IS31LT3910-GRLS2-TR
Package
SOP-8, Lead-free
QTY/Reel
2500
Copyright © 2014 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its
products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services
described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information
and before placing orders for products.
Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction
of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness.
Products are not authorized for use in such applications unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction,
that:
a.) the risk of injury or damage has been minimized;
b.) the user assume all such risks; and
c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances
Integrated Silicon Solution, Inc. – www.issi.com
Rev. B, 05/12/2014
3
IS31LT3910
ABSOLUTE MAXIMUM RATINGS
V
IN
pin voltage to GND
CS, LD, PWMD, GATE, TOFF, VREF pin voltage to GND
V
IN
pin Input Current Range (Note 1)
Junction temperature range, T
J
Storage temperature range, T
STG
R
θJA
ESD (HBM)
ESD (CDM)
-0.3V ~ +8V
-0.3V ~ +6V
1mA ~ 10mA
-40°C ~ +150°C
-65°C ~ +150°C
80°C/W
8kV
500V
Note:
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions
is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
The specifications are at T
A
=25°C and V
INDC
=10V R
IN
=2kΩ, unless otherwise noted (Note 1).
Symbol
V
INDC
V
IN_CLAMP
I
IN
UVLO
△
UVLO
Parameter
Input DC supply voltage range
VIN clamp voltage
Operation current range
Undervoltage lockout threshold
Undervoltage lockout hysteresis
Pin PWMD input low voltage
Pin PWMD input high voltage
Pin PWMD pull-up resistance
Current sense pull-in threshold
voltage
Linear Dimming pin voltage low
threshold
Linear Dimming pin voltage high
threshold
Current sense blanking interval
Delay to output
Off Time
GATE output rise time
GATE output fall time
REF pin voltage
Load regulation of reference
voltage
Conditions
Connect a decent resistor
from DC supply voltage to
VIN pin (Note 2)
(Note 3)
V
IN
=6V, GATE floating
V
IN
rising
V
IN
falling
Min.
8
6.6
0.32
6.0
Typ.
Max.
450
Unit
V
V
mA
V
mV
V
V
kΩ
mV
mV
mV
7.1
0.48
6.5
500
7.6
0.64
6.9
0.8
V
ENL
V
ENH
R
EN
V
CS_TH
V
LD
V
HD
t
BLANK
t
DELAY
t
OFF
t
RISE
t
FALL
V
REF
V
REF_LOAD
2
75
230
100
240
0.05
0.24
400
V
CS
=V
CS_TH
+50mV after
t
BLANK
TOFF pin Floating
C
GATE
=500pF
C
GATE
=500pF
1.12
I
REF
=0~500µA,V
PWMD
=5.0V
420
480
30
510
19
29
1.20
0.5
1.30
5
600
550
125
250
ns
ns
ns
ns
ns
V
mV
Note 1:
All parameters are tested at 25°C. Specifications over temperature are guaranteed by design.
Note 2:
V
INDC
is the power supply to LED, and there should be an appropriate resistor between V
INDC
and V
IN
.
Note 3:
Beyond the input current range, V
IN
may not clamp at 7.1V.
Integrated Silicon Solution, Inc. – www.issi.com
Rev. B, 05/12/2014
4
IS31LT3910
FUNCTIONAL BLOCK DIAGRAM
Integrated Silicon Solution, Inc. – www.issi.com
Rev. B, 05/12/2014
5
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