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74LCX16652MEA_Q

产品描述Bus Transceivers Transceiver/Register
产品类别半导体    逻辑   
文件大小105KB,共10页
制造商ON Semiconductor(安森美)
官网地址http://www.onsemi.cn
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74LCX16652MEA_Q概述

Bus Transceivers Transceiver/Register

74LCX16652MEA_Q规格参数

参数名称属性值
Product AttributeAttribute Value
制造商
Manufacturer
ON Semiconductor(安森美)
产品种类
Product Category
Bus Transceivers
RoHSN
Logic Family74LCX
Input LevelLVTTL, TTL
Output LevelLVCMOS
输出类型
Output Type
3-State
High Level Output Current- 24 mA
Low Level Output Current24 mA
传播延迟时间
Propagation Delay Time
7 ns
电源电压-最大
Supply Voltage - Max
3.6 V
电源电压-最小
Supply Voltage - Min
2 V
最小工作温度
Minimum Operating Temperature
- 40 C
最大工作温度
Maximum Operating Temperature
+ 85 C
封装 / 箱体
Package / Case
SSOP-56
系列
Packaging
Tube
FunctionBus Transceiver / Register
高度
Height
2.74 mm
长度
Length
18.54 mm
Number of Circuits2
产品
Product
CMOS
技术
Technology
CMOS
宽度
Width
7.59 mm
安装风格
Mounting Style
SMD/SMT
Number of Channels16
Supply Current - Max20 uA
工作电源电压
Operating Supply Voltage
2 V to 3.6 V
PolarityNon-Inverting
Triggering TypePositive Edge
单位重量
Unit Weight
0.024508 oz

文档预览

下载PDF文档
74LCX16652 Low Voltage Transceiver/Register with 5V Tolerant Inputs and Outputs
February 1994
Revised April 2001
74LCX16652
Low Voltage Transceiver/Register
with 5V Tolerant Inputs and Outputs
General Description
The LCX16652 contains sixteen non-inverting bidirectional
bus transceivers with 3-STATE outputs providing multi-
plexed transmission of data directly from the input bus or
from the internal registers. Data on the A or B bus will be
clocked into the registers as the appropriate clock pin goes
to the HIGH logic level. Output Enable pins (OEAB, OEBA)
are provided to control the transceiver function (see Func-
tional Description).
The LCX16652 is designed for low-voltage (2.5V or 3.3V)
V
CC
applications with capability of interfacing to a 5V signal
environment.
The LCX16652 is fabricated with an advanced CMOS tech-
nology to achieve high speed operation while maintaining
CMOS low power dissipation.
Features
s
5V tolerant inputs and outputs
s
2.3V–3.6V V
CC
specifications provided
s
5.7 ns t
PD
max (V
CC
=
3.3V), 20
µ
A I
CC
max
s
Power down high impedance inputs and outputs
s
Supports live insertion/withdrawal (Note 1)
s
±
24 mA output drive (V
CC
=
3.0V)
s
Implements patented noise/EMI reduction circuitry
s
Latch-up performance exceeds 500 mA
s
ESD performance:
Human body model
>
2000V
Machine model
>
200V
Note 1:
To ensure the high-impedance state during power up or down, OE
should be tied to V
CC
and OE tied to GND through a resistor: the minimum
value or the resistor is determined by the current-sourcing capability of the
driver.
Ordering Code:
Order Number
74LCX16652MEA
74LCX16652MTD
Package Number
MS56A
MTD56
Package Description
56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300 Wide
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Pin Descriptions
Pin Names
A
0
–A
15
B
0
–B
15
CPAB
n
, CPBA
n
SAB
n
, SBA
n
Description
Data Register A Inputs/3-STATE Outputs
Data Register B Inputs/3-STATE Outputs
Clock Pulse Inputs
Select Inputs
OEAB
n
, OEBA
n
Output Enable Inputs
© 2001 Fairchild Semiconductor Corporation
DS012005
www.fairchildsemi.com

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