74F240, 74F244 Octal Buffers/Line Drivers with 3-STATE Outputs
May 2007
74F240, 74F244
Octal Buffers/Line Drivers with 3-STATE Outputs
Features
■
3-STATE outputs drive bus lines or buffer memory
tm
General Description
The 74F240 and 74F244 are octal buffers and line driv-
ers designed to be employed as memory and address
drivers, clock drivers and bus-oriented transmitters/
receivers which provide improved PC and board density.
address registers
■
Outputs sink 64mA (48mA mil)
■
12mA source current
■
Input clamp diodes limit high-speed termination
effects
Ordering Information
Order Code
74F240SC
(1)
74F240SJ
(1)
74F240PC
74F244SC
(1)
74F244SJ
(1)
74F244MSA
(1)
74F244PC
Package
Number
M20B
M20D
N20A
M20B
M20D
MSA20
N20A
Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Note:
1. Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering number.
Connection Diagrams
74F240
74F244
©1988 Fairchild Semiconductor Corporation
74F240, 74F244 Rev. 1.4
www.fairchildsemi.com
74F240, 74F244 Octal Buffers/Line Drivers with 3-STATE Outputs
Logic Symbols
IEEE/IEC
74F240
IEEE/IEC
74F244
Unit Loading/Fan Out
Pin Names
OE
1
, OE
2
OE
2
I
0
–I
7
I
0
–I
7
O
0
–O
7
, O
0
–O
7
Description
3-STATE Output Enable Input (Active LOW)
3-STATE Output Enable Input (Active HIGH)
Inputs (74F240)
Inputs (74F244)
Outputs
U.L.
HIGH/LOW
1.0 / 1.667
1.0 / 1.667
1.0 / 1.667
(2)
1.0 / 2.667
(2)
600 / 106.6 (80)
Input I
IH
/ I
IL
,
Output I
OH
/ I
OL
20µA / –1mA
20µA / –1mA
20µA / –1mA
20µA / –1.6mA
–12mA / 64mA (48mA)
Note:
2. Worst-case 74F240 enabled; 74F244 disabled.
Truth Tables
74F240
OE
1
H
L
L
74F244
D
1n
X
H
L
O
1n
Z
L
H
OE
2
H
L
L
D
2n
X
H
L
O
2n
Z
L
H
OE
1
H
L
L
D
1n
X
H
L
O
1n
Z
H
L
OE
2
H
L
L
D
2n
X
H
L
O
2n
Z
H
L
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
X
=
Immaterial
Z
=
High Impedance
©1988 Fairchild Semiconductor Corporation
74F240, 74F244 Rev. 1.4
www.fairchildsemi.com
2
74F240, 74F244 Octal Buffers/Line Drivers with 3-STATE Outputs
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
T
STG
T
A
T
J
V
CC
V
IN
I
IN
V
O
Storage Temperature
Parameter
Ambient Temperature Under Bias
Junction Temperature Under Bias
V
CC
Pin Potential to Ground Pin
Input Voltage
(3)
Input Current
(3)
Voltage Applied to Output in HIGH State (with V
CC
= 0V)
Standard Output
3-STATE Output
Current Applied to Output in LOW State (Max.)
ESD Last Passing Voltage (Min.)
Rating
–65°C to +150°C
–55°C to +125°C
–55°C to +150°C
–0.5V to +7.0V
–0.5V to +7.0V
–30mA to +5.0mA
–0.5V to V
CC
–0.5V to 5.5V
twice the rated I
OL
(mA)
4000V
Note:
3. Either voltage limit or current limit is sufficient to protect inputs.
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Symbol
T
A
V
CC
Supply Voltage
Parameter
Free Air Ambient Temperature
Rating
0°C to +70°C
+4.5V to +5.5V
©1988 Fairchild Semiconductor Corporation
74F240, 74F244 Rev. 1.4
www.fairchildsemi.com
3
74F240, 74F244 Octal Buffers/Line Drivers with 3-STATE Outputs
DC Electrical Characteristics
Symbol
V
IH
V
IL
V
CD
V
OH
Parameter
Input HIGH Voltage
Input LOW Voltage
Input Clamp Diode Voltage
Output HIGH Voltage
10% V
CC
10% V
CC
5% V
CC
V
CC
Conditions
Recognized as a HIGH Sig-
nal
Recognized as a LOW Sig-
nal
Min.
2.0
Typ.
Max.
Units
V
0.8
–1.2
2.4
2.0
2.7
0.55
5.0
7.0
50
4.75
3.75
–1.0
–1.6
50
–50
–100
19
50
42
40
60
60
–225
500
29
75
63
60
90
90
V
V
V
Min.
Min.
I
IN
=
–18mA
I
OH
=
–3mA
I
OH
=
–15mA
I
OH
=
–3mA
V
OL
I
IH
I
BVI
I
CEX
V
ID
I
OD
I
IL
Output LOW Voltage
Input HIGH Current
10% V
CC
Min.
Max.
Max.
Max.
0.0
0.0
Max.
I
OL
=
64mA
V
IN
=
2.7V
V
IN
=
7.0V
V
OUT
=
V
CC
I
ID
=
1.9µA
All Other Pins Grounded
V
IOD
=
150mV
All Other Pins Grounded
V
IN
=
0.5V (OE
1
, OE
2
, OE
2
,
D
n
(74F240))
V
IN
=
0.5V (D
n
(74F244))
V
OUT
=
2.7V
V
OUT
=
0.5V
V
OUT
=
0V
V
OUT
=
5.25V
V
O
=
HIGH
V
O
=
LOW
V
O
=
HIGH Z
V
O
=
HIGH
V
O
=
LOW
V
O
=
HIGH Z
V
µA
µA
µA
V
µA
mA
Input HIGH Current Breakdown
Test
Output HIGH Leakage Current
Input Leakage Test
Output Leakage Circuit Current
Input LOW Current
I
OZH
I
OZL
I
OS
I
ZZ
I
CCH
I
CCL
I
CCZ
I
CCH
I
CCL
I
CCZ
Output Leakage Current
Output Leakage Current
Output Short-Circuit Current
Bus Drainage Test
Power Supply Current (74F240)
Power Supply Current (74F240)
Power Supply Current (74F240)
Power Supply Current (74F244)
Power Supply Current (74F244)
Power Supply Current (74F244)
Max.
Max.
Max.
0.0V
Max.
Max.
Max.
Max.
Max.
Max.
µA
µA
mA
µA
mA
mA
mA
mA
mA
mA
©1988 Fairchild Semiconductor Corporation
74F240, 74F244 Rev. 1.4
www.fairchildsemi.com
4
74F240, 74F244 Octal Buffers/Line Drivers with 3-STATE Outputs
AC Electrical Characteristics
T
A
=
+25°C,
V
CC
=
+5.0V,
C
L
=
50pF
Symbol
t
PLH
, t
PHL
T
A
=
–55°C to +125°C, T
A
=
0°C to +70°C,
V
CC
=
5.0V,
V
CC
=
5.0V,
C
L
=
50pF
C
L
=
50pF
Min.
3.0
2.0
2.0
4.0
2.0
2.0
2.0
2.0
2.0
2.0
2.0
2.0
Parameter
Propagation Delay
Data to Output
(74F240)
Output Enable Time
(74F240)
Output Disable Time
(74F240)
Propagation Delay,
Data to Output
(74F244)
Output Enable Time
(74F244)
Output Disable Time
(74F244)
Min. Typ. Max.
3.0
2.0
2.0
4.0
2.0
2.0
2.5
2.5
2.0
2.0
2.0
2.0
5.1
3.5
3.5
6.9
4.0
6.0
4.0
4.0
4.3
5.4
4.5
4.5
7.0
4.7
4.7
9.0
5.3
8.0
5.2
5.2
5.7
7.0
6.0
6.0
Max.
9.0
6.0
6.5
10.5
6.5
12.5
6.5
7.0
7.0
8.5
7.0
7.5
Min.
3.0
2.0
2.0
4.0
2.0
2.0
2.5
2.5
2.0
2.0
2.0
2.0
Max.
8.0
5.7
5.7
10.0
6.3
9.5
6.2
6.5
6.7
8.0
7.0
7.0
Units
ns
t
PZH
, t
PZL
t
PHZ
, t
PLZ
t
PLH
, t
PHL
ns
ns
t
PZH
, t
PZL
t
PHZ
, t
PLZ
ns
©1988 Fairchild Semiconductor Corporation
74F240, 74F244 Rev. 1.4
www.fairchildsemi.com
5
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