FPGA iCE40 LP Family 384 Cells 40nm Technology 1.2V 36-Pin UCBGA Tray
参数名称 | 属性值 |
欧盟限制某些有害物质的使用 | Compliant |
ECCN (US) | EAR99 |
Part Status | Active |
HTS | 8542.39.00.01 |
Family Name | iCE40 LP |
Process Technology | 40nm |
User I/Os | 25 |
Number of I/O Banks | 4 |
Operating Supply Voltage (V) | 1.2 |
Logic Elements | 384 |
Program Memory Type | SRAM |
Device Logic Units | 384 |
Number of Global Clocks | 8 |
JTAG Support | No |
Programmability | Yes |
Reprogrammability Support | Yes |
Number of Look-up Table Input | 4 |
Copy Protection | No |
In-System Programmability | No |
Maximum Differential I/O Pairs | 8 |
Minimum Operating Supply Voltage (V) | 1.14 |
Maximum Operating Supply Voltage (V) | 1.26 |
I/O Voltage (V) | 1.5|1.2|3.3|2.5|1.8 |
Minimum Operating Temperature (°C) | -40 |
Maximum Operating Temperature (°C) | 100 |
系列 Packaging | Tray |
Supplier Package | UCBGA |
Pin Count | 36 |
Standard Package Name | BGA |
Mounting | Surface Mount |
Package Height | 0.9(Max) |
Package Length | 2.5 |
Package Width | 2.5 |
PCB changed | 36 |
Lead Shape | Ball |
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