INTEGRATED CIRCUITS
74ALVT16543
2.5 V/3.3 V ALVT 16-bit registered
transceiver (3-State)
Product data sheet
Supersedes data of 1998 Feb 13
2004 Sep 14
Philips
Semiconductors
Philips Semiconductors
Product data sheet
2.5 V/3.3 V 16-bit registered transceiver (3-State)
74ALVT16543
FEATURES
•
16-bit universal bus interface
•
5 V I/O Compatible
•
3-State buffers
•
Output capability: +64 mA/–32 mA
•
TTL input and output switching levels
•
Input and output interface capability to systems at 5 V supply
•
Bus-hold data inputs eliminate the need for external pull-up
•
•
•
•
•
•
resistors to hold unused inputs
Live insertion/extraction permitted
Power-up 3-State
Power-up reset
No bus current loading when output is tied to 5 V bus
Latch-up protection exceeds 500mA per JEDEC Std 17
ESD protection exceeds 2000 V per MIL STD 883 Method 3015
and 200 V per Machine Model
DESCRIPTION
The 74ALVT16543 is a high-performance BiCMOS product
designed for V
CC
operation at 2.5 V or 3.3 V with I/O compatibility
up to 5 V. The device can be used as two 8-bit transceivers or one
16-bit transceiver.
The 74ALVT16543 contains two sets of eight D-type latches, with
separate control pins for each set. Using data flow from A to B as an
example, when the A-to-B Enable (nEAB) input and the A-to-B Latch
Enable (nLEAB) input are LOW, the A-to-B path is transparent.
A subsequent LOW-to-HIGH transition of the nLEAB signal puts the
A data into the latches where it is stored and the B outputs no longer
change with the A inputs. With nEAB and nOEAB both LOW, the
3-State B output buffers are active and display the data present at
the outputs of the A latches.
Control of data flow from B to A is similar, but using the nEBA,
nLEBA, and nOEBA inputs.
Active bus-hold circuitry is provided to hold unused or floating data
inputs at a valid logic level.
QUICK REFERENCE DATA
SYMBOL
t
PLH
t
PHL
C
IN
C
I/O
I
CCZ
PARAMETER
Propagation delay
nAx to nBx or nBx to nAx
Input capacitance DIR, OE
I/O pin capacitance
Total supply current
CONDITIONS
T
amb
= 25
°C;
GND = 0 V
C
L
= 50 pF
V
I
= 0 V or V
CC
Outputs disabled; V
I/O
= 0 V or V
CC
Outputs disabled
TYPICAL
UNIT
2.5 V
1.8
2.7
3
9
40
3.3 V
1.6
1.8
3
9
70
ns
pF
pF
µA
ORDERING INFORMATION
PACKAGES
56-Pin Plastic SSOP Type III
56-Pin Plastic TSSOP Type II
TEMPERATURE RANGE
–40
°C
to +85
°C
–40
°C
to +85
°C
TYPE NUMBER
74ALVT16543DL
74ALVT16543DGG
DWG NUMBER
SOT371-1
SOT364-1
LOGIC SYMBOL (IEEE/IEC)
56
54
55
1
3
2
1EN3 (BA)
G1
1C5
2EN4 (AB)
G2
2C6
29
31
30
28
26
27
7EN9 (BA)
G7
7C11
8EN10 (AB)
G8
8C12
5
∇
3
6D
5D
4
∇
52
15
∇
9
12 D
11 D
10
∇
42
6
8
9
10
12
13
14
51
49
48
47
45
44
43
16
17
19
20
21
23
24
41
40
38
37
36
34
33
SW00151
2004 Sep 14
2
Philips Semiconductors
Product data sheet
2.5 V/3.3 V 16-bit registered transceiver (3-State)
74ALVT16543
PIN CONFIGURATION
1OEAB
1LEAB
1EAB
GND
1A0
1A1
V
CC
1A2
1A3
1A4
GND
1A5
1A6
1A7
2A0
2A1
2A2
GND
2A3
2A4
2A5
V
CC
2A6
2A7
GND
2EAB
2LEAB
2OEAB
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
1OEBA
1LEBA
1EBA
GND
1B0
1B1
V
CC
1B2
1B3
1B4
GND
1B5
1B6
1B7
2B0
2B1
2B2
GND
2B3
2B4
2B5
V
CC
2B6
2B7
GND
2EBA
2LEBA
2OEBA
LOGIC SYMBOL
5
6
8
9
10
12
13
14
1A0 1A1 1A2 1A3 1A4 1A5 1A6 1A7
3
54
2
55
1EAB
1EBA
1LEAB
1LEBA
1B0 1B1 1B2 1B3 1B4 1B5 1B6 1B7
1OEAB
1OEBA
1
56
52
51
49
48
47
45
44
43
15
16
17
19
20
21
23
24
2A0 2A1 2A2 2A3 2A4 2A5 2A6 2A7
26
31
27
30
2EAB
2EBA
2LEAB
2LEBA
2B0 2B1 2B2 2B3 2B4 2B5 2B6 2B7
2OEAB
2OEBA
28
29
42
41
40
38
37
36
34
33
SH00038
SH00037
PIN DESCRIPTION
PIN NUMBER
5, 6, 8, 9, 10, 12, 13, 14
15, 16, 17, 19, 20, 21, 23, 24
52, 51, 49, 48, 47, 45, 44, 43
42, 41, 40,38, 37, 36, 34, 33
1, 56
28, 29
3, 54
26, 31
2, 55
27, 30
4, 11, 18, 25, 32, 39, 46, 53
7, 22, 35, 50
SYMBOL
1A0 – 1A7,
2A0 – 2A7
1B0 – 1B7,
2B0 – 2B7
1OEAB, 1OEBA,
2OEAB, 2OEBA
1EAB, 1EBA,
2EAB, 2EBA
1LEAB, 1LEBA,
2LEAB, 2LEBA
GND
V
CC
NAME AND FUNCTION
A Data inputs/outputs
B Data inputs/outputs
A to B / B to A Output Enable inputs (active-LOW)
A to B / B to A Enable inputs (active-LOW)
A to B / B to A Latch Enable inputs (active-LOW)
Ground (0 V)
Positive supply voltage
2004 Sep 14
3
Philips Semiconductors
Product data sheet
2.5 V/3.3 V 16-bit registered transceiver (3-State)
74ALVT16543
LOGIC DIAGRAM
DETAIL A
D
LE
Q
nB0
nA0
Q
D
LE
nA1
nA2
nA3
nA4
nA5
nA6
nA7
DETAIL A X 7
nB1
nB2
nB3
nB4
nB5
nB6
nB7
nOEBA
nOEAB
nEBA
nEAB
nLEBA
nLEAB
SH00039
FUNCTION TABLE
INPUTS
nOEXX
H
X
L
L
L
L
L
L
L
H =
h =
L =
l =
X =
↑
=
NC=
Z =
nEXX
X
H
↑
↑
L
L
L
L
L
nLEXX
X
X
L
L
↑
↑
L
L
H
nAx or nBx
X
X
h
l
h
l
H
L
X
OUTPUTS
nBx or nAx
Z
Z
Z
Z
H
L
H
L
NC
Disabled
Disabled
Disabled + Latch
Latch + Display
Transparent
Hold
STATUS
HIGH voltage level
HIGH voltage level one setup time prior to the LOW-to-HIGH transition of nLEXX or nEXX (XX = AB or BA)
LOW voltage level
LOW voltage level one setup time prior to the LOW-to-HIGH transition of nLEXX or nEXX (XX = AB or BA)
Don’t care
LOW-to-HIGH transition of nLEXX or nEXX (XX = AB or BA)
No change
High-impedance or “off ” state
2004 Sep 14
4
Philips Semiconductors
Product data sheet
2.5 V/3.3 V 16-bit registered transceiver (3-State)
74ALVT16543
ABSOLUTE MAXIMUM RATINGS
1, 2
SYMBOL
V
CC
I
IK
V
I
I
OK
V
OUT
I
OUT
T
stg
PARAMETER
DC supply voltage
DC input diode current
DC input voltage
3
DC output diode current
DC output voltage
3
DC output current
out ut
Output in HIGH state
Storage temperature range
–64
–65 to +150
°C
V
O
< 0 V
Output in Off or HIGH state
Output in LOW state
V
I
< 0 V
CONDITIONS
RATING
–0.5 to +4.6
–50
–0.5 to +7.0
–50
–0.5 to +7.0
128
mA
UNIT
V
mA
V
mA
V
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150
°C.
3. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
2.5 V RANGE LIMITS
SYMBOL
V
CC
V
I
V
IH
V
IL
I
OH
I
OL
∆t/∆v
T
amb
DC supply voltage
Input voltage
HIGH-level input voltage
Input voltage
HIGH-level output current
LOW-level output current
LOW-level output current; current duty cycle
≤
50 %; f
≥
1 kHz
Input transition rise or fall rate; Outputs enabled
Operating free-air temperature range
–40
PARAMETER
MIN
2.3
0
1.7
0.7
–8
8
24
10
+85
–40
MAX
2.7
5.5
MIN
3.0
0
2.0
0.8
–32
32
mA
64
10
+85
ns/V
°C
MAX
3.6
5.5
V
V
V
V
mA
3.3 V RANGE LIMITS
UNIT
2004 Sep 14
5
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