SiHW70N60EF
www.vishay.com
Vishay Siliconix
EF Series Power MOSFET with Fast Body Diode
PRODUCT SUMMARY
V
DS
(V) at T
J
max.
R
DS(on)
typ. at 25 °C ()
Q
g
(Max.) (nC)
Q
gs
(nC)
Q
gd
(nC)
Configuration
V
GS
= 10 V
380
62
102
Single
D
FEATURES
650
0.033
• Fast body diode MOSFET using E series
technology
• Reduced t
rr
, Q
rr
, and I
RRM
• Low figure-of-merit (FOM): R
on
x Q
g
• Low input capacitance (C
iss
)
• Increased robustness due to low Q
rr
• Ultra low gate charge (Q
g
)
• Avalanche energy rated (UIS)
• Material categorization: for definitions of compliance
please see
www.vishay.com/doc?99912
TO-247AD
APPLICATIONS
G
G
D
S
S
N-Channel MOSFET
• Telecommunications
- Server and telecom power supplies
• Lighting
- High intensity discharge (HID)
- Light emitting diodes (LEDs)
• Consumer and computing
- ATX power supplies
• Industrial
- Welding
- Battery chargers
• Renewable energy
- Solar (PV inverters)
• Switch mode power suppliers (SMPS)
• Applications using the following topologies
- LLC
- Phase shifted bridge (ZVS)
- 3-level inverter
- AC/DC bridge
ORDERING INFORMATION
Package
Lead (Pb)-free and Halogen-free
TO-247AD
SiHW70N60EF-GE3
ABSOLUTE MAXIMUM RATINGS
(T
C
= 25 °C, unless otherwise noted)
PARAMETER
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current (T
J
= 150 °C)
Pulsed Drain Current
a
Linear Derating Factor
Single Pulse Avalanche
Energy
b
E
AS
P
D
T
J
, T
stg
T
J
= 125 °C
for 10 s
dV/dt
Maximum Power Dissipation
Operating Junction and Storage Temperature Range
Drain-Source Voltage Slope
Reverse Diode dV/dt
d
Soldering Recommendations (Peak Temperature)
c
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature
b. V
DD
= 50 V, starting T
J
= 25 °C, L = 28.2 mH, R
g
= 25
,
I
AS
= 11 A
c. 1.6 mm from case
d. I
SD
= 35 A, dI/dt = 750 A/μs, V
DS
= 400 V
V
GS
at 10 V
T
C
= 25 °C
T
C
= 100 °C
SYMBOL
V
DS
V
GS
I
D
I
DM
LIMIT
600
± 30
70
45
229
4.2
1706
520
-55 to +150
70
50
300
W/°C
mJ
W
°C
V/ns
°C
A
UNIT
V
S17-0297-Rev. B, 27-Feb-17
Document Number: 91599
1
For technical questions, contact:
hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
SiHW70N60EF
www.vishay.com
Vishay Siliconix
THERMAL RESISTANCE RATINGS
PARAMETER
Maximum Junction-to-Ambient
Maximum Junction-to-Case (Drain)
SYMBOL
R
thJA
R
thJC
TYP.
-
-
MAX.
40
0.24
UNIT
°C/W
SPECIFICATIONS
(T
J
= 25 °C, unless otherwise noted)
PARAMETER
Static
Drain-Source Breakdown Voltage
V
DS
Temperature Coefficient
Gate-Source Threshold Voltage (N)
Gate-Source Leakage
Zero Gate Voltage Drain Current
Drain-Source On-State Resistance
Forward Transconductance
Dynamic
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Effective output capacitance, energy
related
a
Effective output capacitance, time
related
b
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Gate Input Resistance
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
Pulsed Diode Forward Current
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
I
S
I
SM
V
SD
t
rr
Q
rr
I
RRM
MOSFET symbol
showing the
integral reverse
p - n junction diode
D
SYMBOL
V
DS
V
DS
/T
J
V
GS(th)
I
GSS
I
DSS
R
DS(on)
g
fs
C
iss
C
oss
C
rss
C
o(er)
TEST CONDITIONS
V
GS
= 0 V, I
D
= 250 μA
Reference to 25 °C, I
D
= 1 mA
V
DS
= V
GS
, I
D
= 250 μA
V
GS
= ± 20 V
V
GS
= ± 30 V
V
DS
= 480 V, V
GS
= 0 V
V
DS
= 480 V, V
GS
= 0 V, T
J
= 125 °C
V
GS
= 10 V
I
D
= 35 A
V
DS
= 30 V, I
D
= 35 A
V
GS
= 0 V,
V
DS
= 100 V,
f = 1 MHz
MIN.
600
-
2.0
-
-
-
-
-
-
-
-
-
-
TYP.
-
0.69
-
-
-
-
-
0.033
25
7500
378
5
263
926
253
62
102
56
107
257
123
1.1
MAX.
-
-
4.0
± 100
±1
1
2
0.038
-
-
-
-
UNIT
V
V/°C
V
nA
μA
μA
mA
S
pF
-
-
380
-
-
84
161
386
185
2.2
ns
nC
V
GS
= 0 V, V
DS
= 0 V to 480 V
C
o(tr)
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
R
g
f = 1 MHz, open drain
V
DD
= 480 V, I
D
= 35 A
R
g
= 9.1
,
V
GS
= 10 V
V
GS
= 10 V
I
D
= 35 A, V
DS
= 480 V
-
-
-
-
-
-
-
-
0.5
-
-
-
-
-
-
-
-
0.9
213
1.6
16
70
A
229
1.2
426
3.2
-
V
ns
μC
A
G
S
T
J
= 25 °C, I
S
= 35 A, V
GS
= 0 V
T
J
= 25 °C, I
F
= I
S
= 35 A,
dI/dt = 100 A/μs, V
R
= 400 V
Notes
a. C
oss(er)
is a fixed capacitance that gives the same energy as C
oss
while V
DS
is rising from 0 % to 80 % V
DS
b. C
oss(tr)
is a fixed capacitance that gives the charging time as C
oss
while V
DS
is rising from 0 % to 80 % V
DS
S17-0297-Rev. B, 27-Feb-17
Document Number: 91599
2
For technical questions, contact:
hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
SiHW70N60EF
www.vishay.com
TYPICAL CHARACTERISTICS
(25 °C, unless otherwise noted)
250
15 V
14 V
13 V
12 V
11 V
10 V
9V
8V
7V
6V
BOTTOM 5 V
TOP
Vishay Siliconix
3.0
T
J
= 25 °C
R
DS(on)
, Drain-to-Source On-Resistance
(Normalized)
2.5
I
D
= 35 A
I
D
, Drain-to-Source Current (A)
200
2.0
150
1.5
100
1.0
V
GS
= 10 V
0.5
50
0
0
5
10
15
20
25
V
DS
, Drain-to-Source Voltage (V)
30
0
-60 -40 -20
0 20 40 60 80 100 120 140 160
T
J
, Junction Temperature (°C)
Fig. 1 - Typical Output Characteristics
Fig. 4 - Normalized On-Resistance vs. Temperature
160
15 V
14 V
13 V
12 V
11 V
10 V
9V
8V
7V
6V
BOTTOM 5 V
TOP
100 000
T
J
= 150 °C
10 000
C, Capacitance (pF)
C
iss
V
GS
= 0 V, f = 1 MHz
C
iss
= C
gs
+ C
gd
, C
ds
shorted
C
rss
= C
gd
C
oss
= C
ds
+ C
gd
I
D
, Drain-to-Source Current (A)
120
1000
C
oss
100
C
rss
10
80
40
0
0
5
10
15
20
25
V
DS
, Drain-to-Source Voltage (V)
30
1
0
100
200
300
400
500
V
DS
, Drain-to-Source Voltage (V)
600
Fig. 2 - Typical Output Characteristics
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
250
5000
I
D
, Drain-to-Source Current (A)
200
T
J
= 25 °C
150
T
J
= 150 °C
100
C
oss
(pF)
C
oss
500
E
oss
45
40
35
30
25
20
15
E
oss
(μJ)
50
V
DS
= 20.2 V
0
0
5
10
15
20
V
GS
,
Gate-to-Source
Voltage (V)
25
50
0
100
200
300
V
DS
400
500
600
10
5
0
Fig. 3 - Typical Transfer Characteristics
Fig. 6 - C
oss
and E
oss
vs. V
DS
S17-0297-Rev. B, 27-Feb-17
Document Number: 91599
3
For technical questions, contact:
hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
SiHW70N60EF
www.vishay.com
Vishay Siliconix
80
24
V
DS
= 480 V
V
DS
= 300 V
V
DS
= 120 V
V
GS
,
Gate-to-Source
Voltage (V)
20
60
16
I
D
, Drain Current (A)
0
100
200
300
400
500
12
40
8
20
4
0
Q
g
, Total
Gate
Charge (nC)
0
25
50
75
100
T
C
, Case Temperature (°C)
125
150
Fig. 7 - Typical Gate Charge vs. Gate-to-Source Voltage
Fig. 10 - Maximum Drain Current vs. Case Temperature
775
V
DS
, Drain-to-Source Breakdown Voltage (V)
100
I
SD
, Reverse Drain Current (A)
T
J
= 150 °C
750
725
700
675
650
625
600
I
D
= 1 mA
575
-60 -40 -20
0
20
40
60
80 100 120 140 160
10
T
J
= 25 °C
1
V
GS
= 0 V
0.1
0.2
0.4
0.6
0.8
1.0
1.2
V
SD
,
Source-Drain
Voltage (V)
1.4
1.6
T
J
, Junction Temperature (°C)
Fig. 8 - Typical Source-Drain Diode Forward Voltage
Operation in this Area
Limited by R
DS(on)
100
Fig. 11 - Typical Drain-to-Source Voltage vs. Temperature
I
DM
Limited
I
D
, Drain Current (A)
10
Limited by R
DS(on)
*
100 μs
1 ms
1
10 ms
0.1
T
C
= 25
°C
T
J
= 150 °C
Single
Pulse
BVDSS Limited
1
10
100
1000
V
DS
, Drain-to-Source Voltage (V)
* V
GS
> minimum V
GS
at which R
DS(on)
is
specified
0.01
Fig. 9 - Maximum Safe Operating Area
S17-0297-Rev. B, 27-Feb-17
Document Number: 91599
4
For technical questions, contact:
hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
SiHW70N60EF
www.vishay.com
1
Duty Cycle = 0.5
Normalized Effective Transient
Thermal Impedance
Vishay Siliconix
0.2
0.1
0.1
0.05
0.02
Single
Pulse
0.01
0.0001
0.001
0.01
Pulse Time (s)
0.1
1
Fig. 12 - Normalized Thermal Transient Impedance, Junction-to-Case
V
DS
V
GS
R
G
R
D
V
DS
t
p
V
DD
+
-
V
DD
D.U.T.
V
DS
10 V
Pulse width
≤
1 µs
Duty factor
≤
0.1 %
I
AS
Fig. 16 - Unclamped Inductive Waveforms
Fig. 13 - Switching Time Test Circuit
V
DS
90 %
10 V
Q
GS
10 %
V
GS
t
d(on)
t
r
t
d(off)
t
f
Q
G
Q
GD
V
G
Charge
Fig. 14 - Switching Time Waveforms
Fig. 17 - Basic Gate Charge Waveform
Current regulator
Same type as D.U.T.
50 kΩ
L
Vary t
p
to obtain
required I
AS
R
G
V
DS
D.U.T
I
AS
12 V
0.2 µF
0.3 µF
+
-
V
DD
D.U.T.
+
-
V
DS
10 V
t
p
0.01
Ω
V
GS
3 mA
Fig. 15 - Unclamped Inductive Test Circuit
I
G
I
D
Current sampling resistors
Fig. 18 - Gate Charge Test Circuit
S17-0297-Rev. B, 27-Feb-17
Document Number: 91599
5
For technical questions, contact:
hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
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