The STK672-120-E is a unipolar fixed-current chopper type 2-phase stepping motor driver hybrid IC. It features power
MOSFETs in the output stage and a built-in phase signal distribution IC. The incorporation of a phase distribution IC
allows the STK672-120-E to control the speed of the motor based on the frequency of an external input clock signal.
It supports two types of excitation for motor control: 2-phase excitation and 1-2 phase excitation. It also provides a
function for switching the motor direction.
Applications
•
Two-phase stepping motor drive in send/receive facsimile units
•
Paper feed in copiers, industrial robots, and other applications that require 2-phase stepping motor drive
Features
•
The motor speed can be controlled by the frequency of an external clock signal (the CLOCK pin signal).
•
The excitation type is switched according to the state (low or high) of the MODE pin. The mode is set to 2-phase or 1-
2 phase excitation on the rising edge of the clock signal.
•
A motor direction switching pin (the CWB pin) is provided.
•
All inputs are schmitt inputs and 40kΩ (typical: –50 to +100%) pull-up resistors are built in.
•
The motor current can be set by changing the Vref pin voltage. Since a 0.165Ω current detection resistor is built in, a
current of 1A is set for each 0.165V of applied voltage.
•
The input frequency range for the clock signal used for motor speed control is 0 to 25kHz.
•
Supply voltage ranges: VCC = 10 to 42V, VDD = 5.0V ±5%
•
This IC supports motor operating currents of up to 2.4A at Tc = 105°C, and of up to 4.0A at Tc = 25°C.
Semiconductor Components Industries, LLC, 2013
June, 2013
61108HKIM/12299RM (OT) No.6042-1/9
STK672-120-E
Specifications
Maximum Ratings
at Tc = 25°C
Parameter
Maximum supply voltage 1
Maximum supply voltage 2
Input voltage
Output current
Repeated avalanche capacity
Allowable power dissipation
Operating substrate temperature
Junction temperature
Storage temperature
Symbol
VCC max
VDD max
VIN max
IOH max
Ear max
Pd max
Tc max
Tj max
Tstg
With an arbitrarily large heat sink. Per MOSFET
No signal
No signal
Logic input pins
VDD = 5V, CLOCK
≥
200Hz
Conditions
Ratings
52
-0.3 to +7.0
-0.3 to +7.0
4.0
36
8.5
105
150
-40 to +125
Unit
V
V
V
A
mJ
W
°C
°C
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating
Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.
Allowable Operating Ranges
at Ta = 25°C
Parameter
Maximum supply voltage 1
Maximum supply voltage 2
Input voltage
Output current 1
Output current 2
Clock frequency
Phase driver withstand voltage
Symbol
VCC
VDD
VIH
IOH1
IOH2
fCL
VDSS
Tc = 105°C, CLOCK
≥
200Hz
Tc = 80°C, CLOCK
≥
200Hz
See the motor curren (IOH) derating curve
Minimum pulse width: 20μs
ID = 1mA (Tc = 25°C)
With signals applied
With signals applied
Conditions
Ratings
10 to 42
5.0 ± 5%
0 to VDD
2.4
3.0
0 to 25
100 min
Unit
V
V
V
A
A
kHz
V
Electrical Characteristics
at Tc = 25°C, VCC = 24V, VDD = 5V
Parameters
VDD supply current
Output average current
FET diode forward voltage
Output saturation voltage
High-level input voltage
Low-level input voltage
Input current
Vref input voltage
Vref input bias current
Symbols
ICCO
Ioave
Vdf
Vsat
VIH
VIL
IIL
VrH
IIB
Conditions
min
CLOCK = GND
With R/L = 3Ω/3.8mH in each phase
Vref = 0.176V
If = 1A (RL = 23Ω)
RL = 23Ω
Pins 6 to 9 (4 pins)
Pins 6 to 9 (4 pins)
With pins 6 to 9 at the ground level.
Pull-up resistance: 40kΩ (typical)
Pin 12
With pin 12 at 1V
62
0
50
125
4.0
1.0
250
3.5
500
0.56
Rating
typ
2.6
0.62
1.1
0.4
max
6
0.69
1.7
0.56
mA
A
V
V
V
V
μA
V
nA
unit
Note: A fixed-voltage power supply must be used.
Package Dimensions
unit:mm (typ)
4167
46.6
41.2
8.5
12.7
1
2.0
(9.6) 11 2=22
4.0
12
0.5
1.0
3.6
25.5
0.4
2.9
No.6042-2/9
A
5
4
3
2
AB
B
BB
VDD 10
F1
Excitation mode
selection
F2
F3
F4
MODE
8
CLOCK
Phase advance
counter
R1
+
-
Chopping circuit
+
-
VrefB
VrefA
C1
RsA
9
Phase excitation
signal generation
Internal Equivalent Circuit Block Diagram
CWB
7
R2
RsB
RESETB
6
STK672-120-E
1 GND
C2
Off time
setting
Vref 12
SUB
SP 11
ITF02596
No.6042-3/9
STK672-120-E
Sample Application Circuit
STK672-120-E
10μF
VDD=5V
CO3
CLOCK
MODE
CWB
RESETB
5V
RO3
RO1
D1
+
CO4 10μF
RO2
Vref
0.1μF
CO1
ITF02597
+
10
9
8
7
6
5
4
3
2
A
AB
B
BB
Two-phase stepping motor
VCC
24V
5V
+
GND
CO2
At least 100μF
P.GND
12
11
1
•
To minimize noise in the 5V system, locate the ground side of capacitor CO2 in the above circuit as close as possible
to pin 1 of the IC.
•
Insert resistor RO3 (47 to 100Ω) so that the discharge energy from capacitor CO4 is not directly applied to the CMOS
IC in this hybrid device. If the diode D1 has Vf characteristics with Vf less than or equal to 0.6V (when If = 0.1A),
this will be smaller than the CMOS IC input pin diode Vf. If this is the case RO3 may be replaced with a short
without problem.
•
Standard or HC type input levels are used for the pin 7, 8, and 9 inputs.
•
If open-collector type circuits are used for the pin 7, 8, and 9 inputs, these circuit will be in the high-impedance state
for high level inputs. As a result, chopping circuit noise may cause the input circuits to operate incorrectly. To prevent
incorrect operation due to such noise, capacitors with values between 470 and 1000pF must be connected between
pins 7 and 11, 8 and 11, and 9 and 11. (A capacitor with a value between 470 and 1000pF must be connected between
pins 6 and 11 as well if an open-collector output IC is used for the RESETB pin (pin 6) input.)
•
Taking the input bias current (IIB) characteristics into account, the resistor RO1 must not exceed 100kΩ.
•
The following circuit (for a lowered current of over 0.2A) is recommended if the application needs to temporarily
lower the motor current. Here, a value of close to 100kΩ must be used for resistor RO1 to make the transistor output
saturation voltage as low as possible.
5V
RO1
Vref
RO1
RO3
RO2
RO3
RO2
Vref
5V
No.6042-4/9
STK672-120-E
Input Pin Functions (CMOS input levels)
Pin
CLOCK
MODE
CWB
RESETB
Pin No.
9
8
7
6
Function
Reference clock for motor phase current switching
Excitation mode selection
Motor direction switching
System reset and A, AB, B, and BB outputs cutoff.
Applications must apply a reset signal for at least 20μs when power is
first applied.
Input conditions when operating
Operates on the rising edge of the signal
Low: 2-phase excitation
High: 1-2 phase excitation
Low: CW (forward)
High: CCW (reverse)
A reset is applied by a low level
•
A simple reset function is formed from D1, CO4, and RO3 in this application circuit. With the CLOCK input held low,
when the 5V supply voltage is brought up a reset is applied if the motor output phases A and BB are driven.
If the 5V supply voltage rise time is slow (over 50ms), the motor output phases A and BB may not be driven. Increase
the value of the capacitor CO4 and check circuit operation again.
•
See the timing chart for the concrete details on circuit operation.
Usage Notes
•
5V system input pins
[RESETB and CLOCK (Input signal timing when power is first applied)]
As shown in the timing chart, a RESETB signal input is required by the driver to operate with the timing in which the
F1 gate is turned on first. The RESETB signal timing must be set up to have a width of at least 20μs, as shown below.
The capacitor CO4 and the resistor RO3 in the application circuit form simple reset circuit that uses the RC time
constant rising time. However, when designing the RESETB input based on CMOS levels, the application must have
the timing shown in figure 1.
Rise of the 5V supply voltage
RESETB signal input
At least 20μs
CLOCK signal
At least 10μs
Figure 1 RESETB and CLOCK Signals Input Timing
See the timing chart for details on the CLOCK, MODE, CWB, and other input pins.
[Vref <Motor current peak value setting>]
In the sample application circuit, the peak value of the motor current (IOH) is set by RO1, RO2, and VDD (5V) as
described by the formula below.
IOH
0
Figure 2 Motor Current IO Flowing into the Driver IC
IOH = Vref
÷
Rs Here, Rs is hybrid IC internal current detection resistor
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