SiHF28N60EF
www.vishay.com
Vishay Siliconix
EF Series Power MOSFET with Fast Body Diode
TO-220 FULLPAK
D
FEATURES
• Fast body diode MOSFET using E series
technology
• Reduced t
rr
, Q
rr
, and I
RRM
• Low figure-of-merit (FOM): R
on
x Q
g
• Low input capacitance (C
iss
)
• Low switching losses due to reduced Q
rr
• Ultra low gate charge (Q
g
)
• Avalanche energy rated (UIS)
• Material categorization: for definitions of compliance
please see
www.vishay.com/doc?99912
G
S
G D S
N-Channel MOSFET
APPLICATIONS
PRODUCT SUMMARY
V
DS
(V) at T
J
max.
R
DS(on)
max. () at 25 °C
Q
g
max. (nC)
Q
gs
(nC)
Q
gd
(nC)
Configuration
V
GS
= 10 V
120
17
33
Single
650
0.123
• Telecommunications
- Server and telecom power supplies
• Lighting
- High intensity discharge (HID)
- Light emitting diodes (LEDs)
• Consumer and computing
- ATX power supplies
• Industrial
- Welding
- Battery chargers
• Renewable energy
- Solar (PV inverters)
• Switch mode power suppliers (SMPS)
• Applications using the following topologies
- LLC
- Phase shifted bridge (ZVS)
- 3-level inverter
- AC/DC bridge
ORDERING INFORMATION
Package
Lead (Pb)-free and Halogen-free
TO-220 FULLPAK
SiHF28N60EF-GE3
ABSOLUTE MAXIMUM RATINGS
(T
C
= 25 °C, unless otherwise noted)
PARAMETER
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current (T
J
= 150 °C)
e
Pulsed Drain
Current
a
V
GS
at 10 V
T
C
= 25 °C
T
C
= 100 °C
SYMBOL
V
DS
V
GS
I
D
I
DM
E
AS
P
D
T
J
, T
stg
T
J
= 125 °C
For 10 s
M3 screw
dV/dt
LIMIT
600
± 30
28
18
75
0.31
691
39
-55 to +150
70
50
300
0.6
W/°C
mJ
W
°C
V/ns
°C
Nm
A
UNIT
V
Linear Derating Factor
Single Pulse Avalanche Energy
b
Maximum Power Dissipation
Operating Junction and Storage Temperature Range
Drain-Source Voltage Slope
Reverse Diode
dV/dt
d
Soldering Recommendations (Peak temperature)
c
Mounting Torque
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature
b. V
DD
= 50 V, starting T
J
= 25 °C, L = 28.2 mH, R
g
= 25
,
I
AS
= 7 A
c. 1.6 mm from case
d. I
SD
I
D
, dI/dt = 900 A/μs, starting T
J
= 25 °C
e. Limited by maximum junction temperature
S17-0294-Rev. C, 27-Feb-17
Document Number: 91604
1
For technical questions, contact:
hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
SiHF28N60EF
www.vishay.com
Vishay Siliconix
SYMBOL
R
thJA
R
thJC
TYP.
-
-
MAX.
65
3.2
UNIT
°C/W
THERMAL RESISTANCE RATINGS
PARAMETER
Maximum Junction-to-Ambient
Maximum Junction-to-Case (Drain)
SPECIFICATIONS
(T
J
= 25 °C, unless otherwise noted)
PARAMETER
Static
Drain-Source Breakdown Voltage
V
DS
Temperature Coefficient
Gate-Source Threshold Voltage (N)
Gate-Source Leakage
Zero Gate Voltage Drain Current
Drain-Source On-State Resistance
Forward Transconductance
Dynamic
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Effective output capacitance, energy
related
a
Effective output capacitance, time
related
b
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Gate Input Resistance
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
Pulsed Diode Forward Current
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
I
S
I
SM
V
SD
t
rr
Q
rr
I
RRM
MOSFET symbol
showing the
integral reverse
p - n junction diode
D
SYMBOL
V
DS
V
DS
/T
J
V
GS(th)
I
GSS
I
DSS
R
DS(on)
g
fs
C
iss
C
oss
C
rss
C
o(er)
TEST CONDITIONS
V
GS
= 0 V, I
D
= 250 μA
Reference to 25 °C, I
D
= 1 mA
V
DS
= V
GS
, I
D
= 250 μA
V
GS
= ± 20 V
V
GS
= ± 30 V
V
DS
= 480 V, V
GS
= 0 V
V
DS
= 480 V, V
GS
= 0 V, T
J
= 125 °C
V
GS
= 10 V
I
D
= 14 A
V
DS
= 30 V, I
D
= 14 A
V
GS
= 0 V,
V
DS
= 100 V,
f = 1 MHz
MIN.
600
-
2.0
-
-
-
-
-
-
-
-
-
-
TYP.
-
0.76
-
-
-
-
-
0.107
9.7
2714
123
6
98
356
80
17
33
24
40
82
39
0.5
MAX.
-
-
4.0
± 100
±1
1
2
0.123
-
-
-
-
UNIT
V
V/°C
V
nA
μA
μA
mA
S
pF
-
-
120
-
-
48
80
123
78
1.0
ns
nC
V
GS
= 0 V, V
DS
= 0 V to 480 V
C
o(tr)
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
R
g
f = 1 MHz, open drain
V
DD
= 480 V, I
D
= 14 A
R
g
= 9.1
,
V
GS
= 10 V
V
GS
= 10 V
I
D
= 14 A, V
DS
= 480 V
-
-
-
-
-
-
-
-
0.2
-
-
-
-
-
-
-
-
0.9
142
0.97
13.2
28
A
70
1.2
284
1.94
-
V
ns
μC
A
G
S
T
J
= 25 °C, I
S
= 11 A, V
GS
= 0 V
T
J
= 25 °C, I
F
= I
S
= 14 A,
dI/dt = 100 A/μs, V
R
= 400 V
Notes
a. C
oss(er)
is a fixed capacitance that gives the same energy as C
oss
while V
DS
is rising from 0 % to 80 % V
DS
b. C
oss(tr)
is a fixed capacitance that gives the charging time as C
oss
while V
DS
is rising from 0 % to 80 % V
DS
S17-0294-Rev. C, 27-Feb-17
Document Number: 91604
2
For technical questions, contact:
hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
SiHF28N60EF
www.vishay.com
TYPICAL CHARACTERISTICS
(25 °C, unless otherwise noted)
80
15 V
14 V
13 V
12 V
11 V
10 V
9V
8V
7V
6V
BOTTOM 5 V
TOP
Vishay Siliconix
3.0
T
J
= 25 °C
R
DS(on)
, Drain-to-Source On-Resistance
(Normalized)
2.5
I
D
= 14 A
I
D
, Drain-to-Source Current (A)
60
2.0
40
1.5
1.0
V
GS
= 10 V
0.5
20
0
0
5
10
15
20
25
V
DS
, Drain-to-Source Voltage (V)
30
0
-60
-40 -20
0 20 40 60 80 100 120 140 160
T
J
, Junction Temperature (°C)
Fig. 1 - Typical Output Characteristics
Fig. 4 - Normalized On-Resistance vs. Temperature
45
I
D
, Drain-to-Source Current (A)
30
C, Capacitance (pF)
15 V
14 V
13 V
12 V
11 V
10 V
9V
8V
7V
6V
BOTTOM 5 V
TOP
10 000
T
J
= 150 °C
C
iss
1000
V
GS
= 0 V, f = 1 MHz
C
iss
= C
gs
+ C
gd
, C
ds
shorted
C
rss
= C
gd
C
oss
= C
ds
+ C
gd
C
oss
100
15
10
C
rss
0
0
5
10
15
20
25
V
DS
, Drain-to-Source Voltage (V)
30
1
0
100
200
300
400
500
V
DS
, Drain-to-Source Voltage (V)
600
Fig. 2 - Typical Output Characteristics
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
80
5000
I
D
, Drain-to-Source Current (A)
T
J
= 25 °C
60
T
J
= 150 °C
40
C
oss
(pF)
C
oss
500
18
16
14
12
10
E
oss
8
6
E
oss
(μJ)
20
4
V
DS
= 28 V
2
50
0
5
10
15
20
V
GS
,
Gate-to-Source
Voltage (V)
25
0
100
200
300
V
DS
400
500
600
0
0
Fig. 3 - Typical Transfer Characteristics
Fig. 6 - C
oss
and E
oss
vs. V
DS
S17-0294-Rev. C, 27-Feb-17
Document Number: 91604
3
For technical questions, contact:
hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
SiHF28N60EF
www.vishay.com
Vishay Siliconix
30
24
V
DS
= 480 V
V
DS
= 300 V
V
DS
= 120 V
I
D
, Drain Current (A)
V
GS
,
Gate-to-Source
Voltage (V)
20
24
16
18
12
12
8
4
6
0
0
40
80
120
Q
g
, Total
Gate
Charge (nC)
160
0
25
50
75
100
125
T
C
, Case Temperature (°C)
150
Fig. 7 - Typical Gate Charge vs. Gate-to-Source Voltage
Fig. 10 - Maximum Drain Current vs. Case Temperature
750
V
DS
, Drain-to-Source Breakdown Voltage (V)
100
I
SD
, Reverse Drain Current (A)
T
J
= 150 °C
725
700
675
650
625
600
I
D
= 250 μA
575
-60 -40 -20
0 20 40 60 80 100 120 140 160
T
J
, Junction Temperature (°C)
10
T
J
= 25 °C
1
V
GS
= 0 V
0.1
0.2
0.4
0.6
0.8
1.0
1.2
V
SD
,
Source-Drain
Voltage (V)
1.4
1.6
Fig. 8 - Typical Source-Drain Diode Forward Voltage
Operation in this Area
Limited by R
DS(on)
Fig. 11 - Typical Drain-to-Source Voltage vs. Temperature
100
I
DM
Limited
10
I
D
, Drain Current (A)
100 μs
Limited by R
DS(on)
*
1
1 ms
0.1
T
C
= 25
°C
T
J
= 150 °C
Single
Pulse
1
10 ms
0.01
BVDSS Limited
10
100
1000
V
DS
, Drain-to-Source Voltage (V)
* V
GS
> minimum V
GS
at which R
DS(on)
is
specified
Fig. 9 - Maximum Safe Operating Area
S17-0294-Rev. C, 27-Feb-17
Document Number: 91604
4
For technical questions, contact:
hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
SiHF28N60EF
www.vishay.com
Vishay Siliconix
1
Duty Cycle = 0.5
Normalized Effective Transient
Thermal Impedance
0.2
0.1
0.1
0.05
0.02
Single
Pulse
0.01
0.0001
0.001
0.01
Pulse Time (s)
0.1
1
Fig. 12 - Normalized Thermal Transient Impedance, Junction-to-Case
V
DS
V
GS
R
G
R
D
V
DS
t
p
V
DD
+
-
V
DD
D.U.T.
V
DS
10 V
Pulse width
≤
1 µs
Duty factor
≤
0.1 %
I
AS
Fig. 16 - Unclamped Inductive Waveforms
Fig. 13 - Switching Time Test Circuit
V
DS
90 %
10 V
Q
GS
10 %
V
GS
t
d(on)
t
r
t
d(off)
t
f
Q
G
Q
GD
V
G
Charge
Fig. 14 - Switching Time Waveforms
Fig. 17 - Basic Gate Charge Waveform
Current regulator
Same type as D.U.T.
50 kΩ
L
Vary t
p
to obtain
required I
AS
R
G
V
DS
D.U.T
I
AS
12 V
0.2 µF
0.3 µF
+
-
V
DD
D.U.T.
+
-
V
DS
10 V
t
p
0.01
Ω
V
GS
3 mA
Fig. 15 - Unclamped Inductive Test Circuit
I
G
I
D
Current sampling resistors
Fig. 18 - Gate Charge Test Circuit
S17-0294-Rev. C, 27-Feb-17
Document Number: 91604
5
For technical questions, contact:
hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
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