MM74HC245A Octal 3-STATE Transceiver
September 1983
Revised May 2005
MM74HC245A
Octal 3-STATE Transceiver
General Description
The MM74HC245A 3-STATE bidirectional buffer utilizes
advanced silicon-gate CMOS technology, and is intended
for two-way asynchronous communication between data
buses. It has high drive current outputs which enable high
speed operation even when driving large bus capaci-
tances. This circuit possesses the low power consumption
and high noise immunity usually associated with CMOS cir-
cuitry, yet has speeds comparable to low power Schottky
TTL circuits.
This device has an active LOW enable input G and a direc-
tion control input, DIR. When DIR is HIGH, data flows from
the A inputs to the B outputs. When DIR is LOW, data flows
from the B inputs to the A outputs. The MM74HC245A
transfers true data from one bus to the other.
This device can drive up to 15 LS-TTL Loads, and does not
have Schmitt trigger inputs. All inputs are protected from
damage due to static discharge by diodes to V
CC
and
ground.
Features
s
Typical propagation delay: 13 ns
s
Wide power supply range: 2–6V
s
Low quiescent current: 80
P
A maximum (74 HC)
s
3-STATE outputs for connection to bus oriented systems
s
High output drive: 6 mA (minimum)
s
Same as the 645
Ordering Code:
Order Number
MM74HC245AWM
MM74HC245ASJ
MM74HC245AMTC
MM74HC245AN
Package Number
M20B
M20D
MTC20
N20A
Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Pin Assignments for DIP, SOIC, SOP and TSSOP
Truth Table
Control
Inputs
G
L
L
H
H HIGH Level
L LOW Level
X Irrelevant
Operation
DIR
L
H
X
B data to A bus
A data to B bus
Isolation
Top View
© 2005 Fairchild Semiconductor Corporation
DS005165
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MM74HC245A
Absolute Maximum Ratings
(Note 1)
(Note 2)
Recommended Operating
Conditions
Min
Supply Voltage (V
CC
)
DC Input or Output Voltage
(V
IN
, V
OUT
)
Operating Temperature Range (T
A
)
Input Rise/Fall Times
(t
r
, t
f
)
V
CC
V
CC
V
CC
2.0V
4.5V
6.0V
1000
500
400
ns
ns
ns
0
V
CC
V
2
Max
6
Units
V
0.5 to
7.0V
DC Input Voltage DIR and G pins (V
IN
)
1.5 to V
CC
1.5V
DC Input/Output Voltage (V
IN
, V
OUT
)
0.5 to V
CC
0.5V
Clamp Diode Current (I
CD
)
r
20 mA
r
35 mA
DC Output Current, per pin (I
OUT
)
DC V
CC
or GND Current, per pin (I
CC
)
r
70 mA
Storage Temperature Range (T
STG
)
65
q
C to
150
q
C
Supply Voltage (V
CC
)
Power Dissipation (P
D
)
(Note 3)
S.O. Package only
Lead Temperature (T
L
)
(Soldering 10 seconds)
260
q
C
600 mW
500 mW
40
85
q
C
Note 1:
Maximum Ratings are those values beyond which damage to the
device may occur.
Note 2:
Unless otherwise specified all voltages are referenced to ground.
Note 3:
Power Dissipation temperature derating — plastic “N” package:
12 mW/
q
C from 65
q
C to 85
q
C.
DC Electrical Characteristics
Symbol
V
IH
Parameter
Minimum HIGH Level Input
Voltage
V
IL
Maximum LOW Level Input
Voltage
V
OH
Minimum HIGH Level Output
Voltage
V
IN
V
IH
or V
IL
(Note 4)
V
CC
2.0V
4.5V
6.0V
2.0V
4.5V
6.0V
T
A
Typ
1.5
3.15
4.2
0.5
1.35
1.8
2.0
4.5
6.0
4.2
5.7
0
0
0
0.2
0.2
1.9
4.4
5.9
3.98
5.48
0.1
0.1
0.1
0.26
0.26
25
q
C
T
A
Conditions
40 to 85
q
C T
A
55 to 125
q
C
Guaranteed Limits
1.5
3.15
4.2
0.5
1.35
1.8
1.9
4.4
5.9
3.84
5.34
0.1
0.1
0.1
0.33
0.33
1.5
3.15
4.2
0.5
1.35
1.8
1.9
4.4
5.9
3.7
5.2
0.1
0.1
0.1
0.4
0.4
Units
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
|I
OUT
|
d
20
P
A
2.0V
4.5V
6.0V
V
IN
V
IH
or V
IL
4.5V
6.0V
2.0V
4.5V
6.0V
|I
OUT
|
d
6.0 mA
|I
OUT
|
d
7.8 mA
V
OL
Maximum LOW Level Output
Voltage
V
IN
V
IH
or V
IL
|I
OUT
|
d
20
P
A
V
IN
V
IH
or V
IL
4.5V
6.0V
6.0V
6.0V
6.0V
|I
OUT
|
d
6.0 mA
|I
OUT
|
d
7.8 mA
I
IN
I
OZ
I
CC
Input Leakage
Current (G and DIR)
Maximum 3-STATE Output
Leakage Current
Maximum Quiescent Supply
Current
V
OUT
V
IN
I
OUT
V
CC
or GND
V
IH
V
CC
or GND
0
P
A
V
IN
V
CC
to GND
r
0.1
r
0.5
8.0
r
1.0
r
5.0
80
r
1.0
r
10
160
P
A
P
A
P
A
Enable G
Note 4:
For a power supply of 5V
r
10% the worst case output voltages (V
OH
, and V
OL
) occur for HC at 4.5V. Thus the 4.5V values should be used when
designing with this supply. Worst case V
IH
and V
IL
occur at V
CC
5.5V and 4.5V respectively. (The V
IH
value at 5.5V is 3.85V.) The worst case leakage cur-
rent (I
IN
, I
CC
, and I
OZ
) occur for CMOS at the higher voltage and so the 6.0V values should be used.
3
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MM74HC245A
AC Electrical Characteristics
V
CC
5V, T
A
25
q
C, t
r
t
f
6ns
Parameter
Conditions
C
L
R
L
C
L
R
L
C
L
45 pF
1 k
:
45 pF
1 k
:
5 pF
18
25
ns
Typ
12
24
Guaranteed
Limit
17
35
Units
ns
ns
Symbol
t
PHL
, t
PLH
t
PZH
, t
PZL
t
PHZ
, t
PLZ
Maximum Propagation Delay
Maximum Output Enable
Time
Maximum Output Disable
Time
AC Electrical Characteristics
V
CC
2.0V to 6.0V, C
L
50 pF, t
r
t
f
6ns (unless otherwise specified)
Conditions
C
L
C
L
C
L
C
L
C
L
C
L
50 pF
150 pF
50 pF
150 pF
50 pF
150 pF
1 k
:
50 pF
150 pF
50 pF
150 pF
50 pF
150 pF
1 k
:
50 pF
2.0V
2.0V
4.5V
4.5V
6.0V
6.0V
2.0V
4.5V
6.0V
2.0V
4.5V
6.0V
71
81
26
31
21
25
39
20
18
20
6
5
50
5
5
15
10
20
10
20
10
20
190
240
38
48
32
41
135
27
23
60
12
10
240
300
48
60
41
51
169
34
29
75
15
13
285
360
57
72
48
61
203
41
34
90
18
15
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
pF
pF
pF
pF
V
CC
2.0V
2.0V
4.5V
4.5V
6.0V
6.0V
T
A
Typ
31
41
13
17
11
14
90
96
18
22
15
19
25
q
C
T
A
Symbol
t
PHL
,
t
PLH
Parameter
Maximum Propagation
Delay
40 to 85
q
C T
A
55 to 125
q
C
Guaranteed Limits
113
116
23
28
19
23
135
128
27
33
23
28
Units
ns
ns
ns
ns
ns
ns
t
PZH
,
t
PZL
Maximum Output Enable
Time
R
L
C
L
C
L
C
L
C
L
C
L
C
L
t
PHZ
,
t
PLZ
Maximum Output Disable
Time
R
L
C
L
t
TLH
, t
THL
Output Rise and Fall Time
C
L
50 pF
C
PD
C
IN
C
IN/OUT
Power Dissipation
Capacitance (Note 5)
Maximum Input Capacitance
Maximum Input/Output
Capacitance, A or B
G
G
V
IL
V
IH
Note 5:
C
PD
determines the no load dynamic power consumption, P
D
C
PD
V
CC2
f
I
CC
V
CC
, and the no load dynamic current consumption, I
S
C
PD
V
CC
f
I
CC
.
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4