LTC2609/LTC2619/LTC2629
Quad 16-/14-/12-Bit
Rail-to-Rail DACs with
I
2
C Interface
DESCRIPTIO
The LTC
®
2609/LTC2619/LTC2629 are quad 16-, 14- and
12-bit, 2.7V-to-5.5V rail-to-rail voltage output DACs in a
16-lead SSOP package. They have built-in high perfor-
mance output buffers and are guaranteed monotonic.
These parts establish new board-density benchmarks for
16- and 14-bit DACs and advance performance standards
for output drive and load regulation in single-supply,
voltage-output DACs.
The parts use a 2-wire, I
2
C compatible serial interface. The
LTC2609/LTC2619/LTC2629 operate in both the standard
mode (clock rate of 100kHz) and the fast mode (clock rate
of 400kHz).
The LTC2609/LTC2619/LTC2629 incorporate a power-on
reset circuit. During power-up, the voltage outputs rise
less than 10mV above zero scale; after power-up, they stay
at zero scale until a valid write and update take place. The
power-on reset circuit resets the LTC2609-1/LTC2619-1/
LTC2629-1 to midscale. The voltage outputs stay at
midscale until a valid write and update take place.
, LTC and LT are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
Protected by U.S. Patents, including 5396245. Patent pending.
FEATURES
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Smallest Pin-Compatible Quad DACs:
LTC2609: 16 Bits
LTC2619: 14 Bits
LTC2629: 12 Bits
Guaranteed Monotonic Over Temperature
Separate Reference Inputs
27 Selectable Addresses
400kHz I
2
C
™
Interface
Wide 2.7V to 5.5V Supply Range
Low Power Operation: 250µA per DAC at 3V
Individual Channel Power Down to 1µA (Max)
High Rail-to-Rail Output Drive (±15mA, Min)
Ultralow Crosstalk Between DACs (5µV)
LTC2609/LTC2619/LTC2629: Power-On Reset to
Zero Scale
LTC2609-1/LTC2619-1/LTC2629-1: Power-On Reset
to Midscale
Tiny 16-Lead Narrow SSOP Package
APPLICATIO S
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Mobile Communications
Process Control and Industrial Automation
Automatic Test Equipment and Instrumentation
BLOCK DIAGRA
REFA
V
OUTA
3
DAC
REGISTER
4
DAC A
REFLO
2
INPUT
REGISTER
GND
1
INPUT
REGISTER
V
CC
16
15
REFD
DAC
REGISTER
DAC D
14
V
OUTD
1.0
DAC
REGISTER
INPUT
REGISTER
INPUT
REGISTER
DAC
REGISTER
V
OUTB
5
6
DAC B
DAC C
13
V
OUTC
12
REFC
REFB
CONTROL
LOGIC
DNL (LSB)
32-BIT SHIFT REGISTER
11
CA0
SCL
SDA
8
9
I
2
C
INTERFACE
ADDRESS
DECODE
LOGIC
10
CA1
7
CA2
2609 BD
U
W
U
Differential Nonlinearity
(LTC2609)
0.8
0.6
0.4
0.2
0
–0.2
–0.4
–0.6
–0.8
–1.0
0
16384
32768
CODE
49152
65535
2609 G02
V
CC
= 5V
V
REF
= 4.096V
26091929f
1
LTC2609/LTC2619/LTC2629
ABSOLUTE
AXI U
RATI GS
(Note 1)
Operating Temperature Range:
LTC2609C/LTC2619C/LTC2629C
LTC2609C-1/LTC2619C-1/LTC2629C-1 ... 0°C to 70°C
LTC2609I/LTC2619I/LTC2629I
LTC2609I-1/LTC2619I-1/LTC2629I-1 .. – 40°C to 85°C
Any Pin to GND ........................................... – 0.3V to 6V
Any Pin to V
CC
.............................................– 6V to 0.3V
Maximum Junction Temperature ......................... 125°C
Storage Temperature Range ................ – 65°C to 125°C
Lead Temperature (Soldering, 10 sec)................ 300°C
PACKAGE/ORDER I FOR ATIO
TOP VIEW
GND
REFLO
REFA
V
OUTA
V
OUTB
REFB
CA2
SCL
1
2
3
4
5
6
7
8
16 V
CC
15 REFD
14 V
OUTD
13 V
OUTC
12 REFC
11 CA0
10 CA1
9
SDA
GN PACKAGE
16-LEAD PLASTIC SSOP
T
JMAX
= 135°C,
θ
JA
= 150°C
Consult LTC Marketing for parts specified with wider operating temperature ranges.
The
●
denotes specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. REFA = REFB = REFC = REFD = 4.096V (V
CC
= 5V), REFA = REFB =
REFC = REFD = 2.048V (V
CC
= 2.7V), REFLO = 0V, V
OUT
unloaded, unless otherwise noted.
SYMBOL PARAMETER
DC Performance
Resolution
Monotonicity
DNL
Differential Nonlinearity
INL
Integral Nonlinearity
Load Regulation
CONDITIONS
●
ELECTRICAL CHARACTERISTICS
ZSE
V
OS
GE
Zero-Scale Error
Offset Error
V
OS
Temperature
Coefficient
Gain Error
Gain Temperature
Coefficient
(Note 2)
(Note 2)
(Note 2)
V
REF
= V
CC
= 5V, Midscale
I
OUT
= 0mA to 15mA Sourcing
I
OUT
= 0mA to 15mA Sinking
V
REF
= V
CC
= 2.7V, Midscale
I
OUT
= 0mA to 7.5mA Sourcing
I
OUT
= 0mA to 7.5mA Sinking
Code = 0
(Note 4)
2
U
U
W
W W
U
W
ORDER PART NUMBER
LTC2609CGN
LTC2609CGN-1
LTC2609IGN
LTC2609IGN-1
LTC2619CGN
LTC2619CGN-1
LTC2619IGN
LTC2619IGN-1
LTC2629CGN
LTC2629CGN-1
LTC2629IGN
LTC2629IGN-1
GN PART MARKING
2609
26091
2609I
2609I1
2619
26191
2619I
2619I1
2629
26291
2629I
2629I1
LTC2629/LTC2629-1 LTC2619/LTC2619-1 LTC2609/LTC2609-1
MIN TYP MAX MIN TYP MAX MIN TYP MAX
12
12
±1
±0.5
±4
14
14
±4
0.1
0.1
0.2
0.2
1.5
±1
±6
±0.1
±3
±1
±16
0.5
0.5
1
1
9
±9
16
16
±16
0.3
0.4
0.7
0.8
1.5
±1
±6
±0.1
±3
±1
±64
2
2
4
4
9
±9
UNITS
Bits
Bits
LSB
LSB
LSB/mA
LSB/mA
LSB/mA
LSB/mA
mV
mV
µV/°C
%FSR
ppm/°C
26091929f
●
●
●
●
●
●
●
●
●
0.02 0.125
0.02 0.125
0.04
0.05
1.5
±1
±6
±0.1
±3
0.25
0.25
9
±9
●
±0.7
±0.7
±0.7
LTC2609/LTC2619/LTC2629
The
●
denotes specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. REFA = REFB = REFC = REFD = 4.096V (V
CC
= 5V), REFA = REFB =
REFC = REFD = 2.048V (V
CC
= 2.7V), REFLO = 0V, V
OUT
unloaded, unless otherwise noted. (Note 9)
SYMBOL
PSR
R
OUT
PARAMETER
Power Supply Rejection
DC Output Impedance
DC Crosstalk (Note 10)
CONDITIONS
V
CC
±10%
V
REF
= V
CC
= 5V, Midscale; –15mA
≤
I
OUT
≤
15mA
V
REF
= V
CC
= 2.7V, Midscale; –7.5mA
≤
I
OUT
≤
7.5mA
Due to Full-Scale Output Change (Note 11)
Due to Load Current Change
Due to Powering Down (Per Channel)
V
CC
= 5.5V, V
REF
= 5.5V
Code: Zero Scale; Forcing Output to V
CC
Code: Full Scale; Forcing Output to GND
V
CC
= 2.7V, V
REF
= 2.7V
Code: Zero Scale; Forcing Output to V
CC
Code: Full Scale; Forcing Output to GND
Reference Input
Input Voltage Range
Resistance
Capacitance
I
REF
V
CC
I
CC
Reference Current, Power Down Mode DAC Powered Down
Positive Supply Voltage
Supply Current
For Specified Performance
V
CC
= 5V (Note 3)
V
CC
= 3V (Note 3)
DAC Powered Down (Note 3) V
CC
= 5V
DAC Powered Down (Note 3) V
CC
= 3V
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
ELECTRICAL CHARACTERISTICS
MIN
TYP
–80
0.030
0.035
±5
±4
±4
MAX
0.15
0.15
UNITS
dB
Ω
Ω
µV
µV/mA
µV
I
SC
Short-Circuit Output Current
15
15
7.5
7.5
0
88
36
36
22
30
60
60
50
50
V
CC
mA
mA
mA
mA
V
kΩ
pF
µA
V
mA
mA
µA
µA
V
V
Normal Mode
●
125
14
0.001
160
1
5.5
Power Supply
2.7
1.25
1
0.35
0.15
2
1.6
1
1
0.3V
CC
0.7V
CC
0.15V
CC
0.85V
CC
10
10
2
0
0.4
250
50
1
10
400
10
Digital I/O (Note 9)
V
IL
V
IH
V
IL(CAn)
V
IH(CAn)
R
INH
R
INL
R
INF
V
OL
t
OF
t
SP
I
IN
C
IN
C
B
C
CAX
Low Level Input Voltage
(SDA and SCL)
High Level Input Voltage
(SDA and SCL)
Low Level Input Voltage on CAn
(n = 0, 1, 2)
High Level Input Voltage on CAn
(n = 0, 1, 2)
Resistance from CAn (n = 0, 1, 2)
to V
CC
to Set CAn = V
CC
Resistance from CAn (n = 0, 1, 2)
to GND to Set CAn = GND
Resistance from CAn (n = 0, 1, 2)
to V
CC
or GND to Set CAn = Float
Low Level Output Voltage
Output Fall Time
Pulse Width of Spikes Suppressed
by Input Filter
Input Leakage
I/O Pin Capacitance
Capacitive Load for Each Bus Line
External Capacitive Load on Address
Pins CAn (n = 0, 1, 2)
0.1V
CC
≤
V
IN
≤
0.9V
CC
(Note 12)
See Test Circuit 1
See Test Circuit 1
See Test Circuit 2
See Test Circuit 2
See Test Circuit 2
Sink Current = 3mA
V
O
= V
IH(MIN)
to V
O
= V
IL(MAX)
,
C
B
= 10pF to 400pF (Note 7)
●
●
●
●
●
●
V
V
kΩ
kΩ
MΩ
V
ns
ns
µA
pF
pF
pF
26091929f
●
20 + 0.1C
B
●
●
●
●
●
0
3
LTC2609/LTC2619/LTC2629
The
●
denotes specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. REFA = REFB = REFC = REFD = 4.096V (V
CC
= 5V), REFA = REFB =
REFC = REFD = 2.048V (V
CC
= 2.7V), REFLO = 0V, V
OUT
unloaded, unless otherwise noted.
SYMBOL PARAMETER
AC Performance
t
S
Settling Time (Note 5)
±0.024%
(±1LSB at 12 Bits)
±0.006%
(±1LSB at 14 Bits)
±0.0015%
(±1LSB at 16 Bits)
±0.024%
(±1LSB at 12 Bits)
±0.006%
(±1LSB at 14 Bits)
±0.0015%
(±1LSB at 16 Bits)
7
7
9
2.7
4.8
0.7
1000
12
180
120
100
15
7
9
10
2.7
4.8
5.2
0.7
1000
12
180
120
100
15
µs
µs
µs
µs
µs
µs
V/µs
pF
nV • s
kHz
nV/√Hz
nV/√Hz
µV
P-P
CONDITIONS
LTC2629/LTC2629-1 LTC2619/LTC2619-1 LTC2609/LTC2609-1
MIN TYP MAX MIN TYP MAX MIN TYP MAX
UNITS
ELECTRICAL CHARACTERISTICS
Settling Time for 1LSB Step
(Note 6)
Voltage Output Slew Rate
Capacitive Load Driving
Glitch Impulse
Multiplying Bandwidth
e
n
Output Voltage Noise Density
Output Voltage Noise
2.7
0.7
1000
At Midscale Transition
At f = 1kHz
At f = 10kHz
0.1Hz to 10Hz
12
180
120
100
15
The
●
denotes specifications which apply over the full operating temperature
range, otherwise specifications are at T
A
= 25°C. (See Figure 1) (Notes 8, 9)
SYMBOL PARAMETER
V
CC
= 2.7V to 5.5V
f
SCL
SCL Clock Frequency
t
HD(STA)
Hold Time (Repeated) Start Condition
t
LOW
Low Period of the SCL Clock Pin
t
HIGH
High Period of the SCL Clock Pin
t
SU(STA)
Set-Up Time for a Repeated Start Condition
t
HD(DAT)
Data Hold Time
t
SU(DAT)
Data Set-Up Time
t
r
Rise Time of Both SDA and SCL Signals
t
f
Fall Time of Both SDA and SCL Signals
t
SU(STO)
Set-Up Time for Stop Condition
t
BUF
Bus Free Time Between a Stop and Start Condition
t
1
Falling Edge of 9th Clock of the 3rd Input Byte
to LDAC High or Low Transition
t
2
LDAC Low Pulse Width
CONDITIONS
●
●
●
●
●
●
●
TI I G CHARACTERISTICS
Note 1:
Absolute maximum ratings are those values beyond which the life
of a device may be impaired.
Note 2:
Linearity and monotonicity are defined from code k
L
to code
2
N
– 1, where N is the resolution and k
L
is given by k
L
= 0.016(2
N
/V
REF
),
rounded to the nearest whole code. For V
REF
= 4.096V and N = 16, k
L
=
256 and linearity is defined from code 256 to code 65,535.
Note 3:
SDA, SCL at 0V or V
CC
, CA0, CA1 and CA2 floating.
Note 4:
Inferred from measurement at code k
L
(see Note 2) and at full
scale.
Note 5:
V
CC
= 5V, V
REF
= 4.096V. DAC is stepped 1/4 scale to 3/4 scale
and 3/4 scale to 1/4 scale. Load is 2k in parallel with 200pF to GND.
4
UW
MIN
0
0.6
1.3
0.6
0.6
0
100
20 + 0.1C
B
20 + 0.1C
B
0.6
1.3
400
20
TYP
MAX
400
UNITS
kHz
µs
µs
µs
µs
µs
ns
ns
ns
µs
µs
ns
ns
0.9
300
300
(Note 7)
(Note 7)
●
●
●
●
●
●
Note 6:
V
CC
= 5V, V
REF
= 4.096V. DAC is stepped
±1LSB
between half
scale and half scale – 1. Load is 2k in parallel with 200pF to GND.
Note 7:
C
B
= capacitance of one bus line in pF.
Note 8:
All values refer to V
IH(MIN)
and V
IL(MAX)
levels.
Note 9:
These specifications apply to LTC2609/LTC2609-1,
LTC2619/LTC2619-1, LTC2629/LTC2629-1.
Note 10:
DC crosstalk is measured with V
CC
= 5V, REFA = REFB = REFC =
REFD = 4.096V, with the measured DAC at midscale, unless otherwise
noted.
Note 11:
R
L
= 2kΩ to GND or V
CC
.
Note 12:
Guaranteed by design and not production tested.
26091929f
LTC2609/LTC2619/LTC2629
TYPICAL PERFOR A CE CHARACTERISTICS
LTC2609
Integral Nonlinearity (INL)
32
24
16
DNL (LSB)
INL (LSB)
8
0
–8
–16
–24
–32
0
16384
32768
CODE
49152
65535
2609 G01
V
CC
= 5V
V
REF
= 4.096V
0
–0.2
–0.4
–0.6
–0.8
–1.0
0
16384
32768
CODE
49152
65535
2609 G02
INL (LSB)
DNL vs Temperature
1.0
0.8
0.6
16
0.4
DNL (LSB)
0.2
0
–0.2
–0.4
–16
–0.6
–0.8
–1.0
–50
–30
–10 10
30
50
TEMPERATURE (°C)
70
90
–24
–32
DNL (NEG)
DNL (POS)
INL (LSB)
V
CC
= 5V
V
REF
= 4.096V
0
–8
INL (NEG)
DNL (LSB)
Settling to
±1LSB
V
OUT
100µV/DIV
9TH CLOCK
OF 3RD DATA
BYTE
9.7µs
SCL
2V/DIV
V
CC
= 5V, V
REF
= 4.096V
1/4 SCALE TO 3/4 SCALE STEP
R
L
= 2k, C
L
= 200pF
AVERAGE OF 2048 EVENTS
U W
2609 G04
Differential Nonlinearity (DNL)
1.0
0.8
0.6
0.4
0.2
16
8
0
–8
–16
–24
V
CC
= 5V
V
REF
= 4.096V
32
24
INL vs Temperature
V
CC
= 5V
V
REF
= 4.096V
INL (POS)
INL (NEG)
–32
–50
–30
–10 10
30
50
TEMPERATURE (°C)
70
90
2609 G03
INL vs V
REF
32
24
V
CC
= 5.5V
1.5
1.0
INL (POS)
0.5
DNL vs V
REF
V
CC
= 5.5V
8
DNL (POS)
0
DNL (NEG)
–0.5
–1.0
–1.5
0
1
2
3
V
REF
(V)
4
5
2609 G05
0
1
2
3
V
REF
(V)
4
5
2609 G06
Settling of Full-Scale Step
V
OUT
100µV/DIV
12.3µs
9TH CLOCK OF
3RD DATA BYTE
SCR
2V/DIV
2µs/DIV
2609 G07
5µs/DIV
SETTLING TO
±1LSB
V
CC
= 5V, V
REF
= 4.096V
CODE 512 TO 65535 STEP
AVERAGE OF 2048 EVENTS
2609 G08
26091929f
5