IRFD9010, SiHFD9010
Vishay Siliconix
Power MOSFET
PRODUCT SUMMARY
V
DS
(V)
R
DS(on)
(Ω)
Q
g
(Max.) (nC)
Q
gs
(nC)
Q
gd
(nC)
Configuration
V
GS
= - 10 V
11
3.8
4.1
Single
- 50
0.50
FEATURES
•
•
•
•
•
•
•
•
For Automatic Insertion
Compact, End Stackable
Fast Switching
Low Drive Current
Easy Paralleled
Excellent Temperature Stability
P-Channel Versatility
Compliant to RoHS Directive 2002/95/EC
DESCRIPTION
S
HVMDIP
G
S
D
G
D
P-Channel MOSFET
The HVMDIP technology is the key to Vishay’s advanced
line of power MOSFET transistors. The efficient geometry
and unique processing of the HVMDIP design achieves
very low on-state resistance combined with high
transconductance and extreme device ruggedness.
The p-channel HVMDIPs are designed for application which
require the convenience of reverse polarity operation. They
retain all of the features of the more common n-channel
HVMDIPs such as voltage control, very fast switching, ease
of paralleling, and excellent temperature stability.
P-channels HVMDIPs are intended for use in power stages
where complementary symmetry with n-channel devices
offers circuit simplification. They are also very useful in drive
stages because of the circuit versatility offered by the
reverse polarity connection. Applications include motor
control, audio amplifiers, switched mode converters, control
circuits and pulse amplifiers.
ORDERING INFORMATION
Package
Lead (Pb)-free
SnPb
HVMDIP
IRFD9010PbF
SiHFD9010-E3
IRFD9010
SiHFD9010
ABSOLUTE MAXIMUM RATINGS
(T
C
= 25 °C, unless otherwise noted)
PARAMETER
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current
Pulsed Drain
Current
a
L = 100 µH see fig. 14
see fig. 15
T
C
= 25 °C
for 10 s
V
GS
at - 10 V
T
C
= 25 °C
T
C
= 100 °C
SYMBOL
V
DS
V
GS
I
D
I
DM
I
LM
I
L
P
D
T
J
, T
stg
LIMIT
- 50
± 20
- 1.1
- 0.68
- 8.8
0.01
- 8.8
- 1.5
1
- 55 to + 150
300
d
W/°C
A
W
°C
A
UNIT
V
Linear Derating Factor
Inductive Current, Clamped
Inductive Current, Unclamped (Avalanche Current)
Maximum Power Dissipation
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. V
DD
= - 25 V, starting T
J
= 25 °C, L = 52 mH, R
g
= 25
Ω,
I
AS
= - 2.0 A (see fig. 12).
c. I
SD
≤
- 4.0 A, dI/dt
≤
75 A/μs, V
DD
≤
V
DS
, T
J
≤
175 °C.
d. 1.6 mm from case.
* Pb containing terminations are not RoHS compliant, exemptions may apply
Document Number: 91405
S10-0998-Rev. A, 26-Apr-10
www.vishay.com
1
IRFD9010, SiHFD9010
Vishay Siliconix
THERMAL RESISTANCE RATINGS
PARAMETER
Maximum Junction-to-Ambient
SYMBOL
R
thJA
TYP.
-
MAX.
120
UNIT
°C/W
SPECIFICATIONS
(T
J
= 25 °C, unless otherwise noted)
PARAMETER
Static
Drain-Source Breakdown Voltage
V
DS
Temperature Coefficient
Gate-Source Threshold Voltage
Gate-Source Leakage
Zero Gate Voltage Drain Current
On-State Drain Current
Drain-Source On-State Resistance
Forward Transconductance
Dynamic
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Internal Drain Inductance
Internal Source Inductance
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
Pulsed Diode Forward
Body Diode Voltage
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge
Forward Turn-On Time
Current
a
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
MOSFET symbol
showing the
integral reverse
p - n junction diode
D
SYMBOL
V
DS
ΔV
DS
/T
J
V
GS(th)
I
GSS
I
DSS
I
D(on)
R
DS(on)
g
fs
C
iss
C
oss
C
rss
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
D
L
S
TEST CONDITIONS
V
GS
= 0 V, I
D
= - 250 μA
Reference to 25 °C, I
D
= - 1 mA
V
DS
= V
GS
, I
D
= - 250 μA
V
GS
= ± 20 V
V
DS
= - 50 V, V
GS
= 0 V
V
DS
= - 40 V, V
GS
= 0 V, T
J
= 125 °C
V
GS
= 10 V
V
GS
= - 10 V
V
DS
> I
D(on)
x R
DS(on)
max.
I
D
= - 0.58 A
b
MIN.
- 50
-
- 2.0
-
-
-
- 1.1
-
1.7
-
-
-
-
-
-
-
TYP.
-
- 0.091
-
-
-
-
-
0.35
2.5
240
160
30
7.2
2.5
2.7
6.1
47
13
39
4.0
6.0
MAX.
-
-
- 4.0
± 500
- 250
- 1000
-
0.50
-
-
-
-
11
3.8
4.1
9.2
71
20
59
-
UNIT
V
V/°C
V
nA
μA
A
Ω
S
V
DS
= - 20 V, I
D
= - 2.4 A
V
GS
= 0 V,
V
DS
= - 25 V,
f = 1.0 MHz, see fig. 5
I
D
= - 4.7 A, V
DS
= 0.8 V
see fig. 6 and 13
b
pF
V
GS
= - 10 V
nC
V
DD
= - 25 V, I
D
= - 4.7 A
R
g
= 24
Ω,
R
D
= 5.6
Ω,
see fig. 10
b
Between lead,
6 mm (0.25") from
package and center of
die contact
D
-
-
-
-
-
S
ns
G
nH
-
-
-
-
33
0.090
-
-
-
75
0.22
- 1.1
- 8.8
- 5.5
160
0.52
A
G
S
T
J
= 25 °C, I
S
= - 0.7 A, V
GS
= 0 V
b
T
J
= 25 °C, I
F
= - 4.7 A, dI/dt = 100 A/μs
b
V
ns
μC
Intrinsic turn-on time is negligible (turn-on is dominated by L
S
and L
D
)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width
≤
300 μs; duty cycle
≤
2 %.
www.vishay.com
2
Document Number: 91405
S10-0998-Rev. A, 26-Apr-10
IRFD9010, SiHFD9010
Vishay Siliconix
TYPICAL CHARACTERISTICS
(25 °C, unless otherwise noted)
- 10 V
80 μs Pulse Width
-8V
R
DS(on)
, Drain-to-Source on Resistance
(Normalized)
10
3.0
I
D
= - 4.7 V
2.4
- I
D
, Drain Current (A)
8
-7V
6
1.8
4
V
GS
= - 6 V
1.2
2
-5V
-4V
0.6
V
GS
= - 10 V
0
- 60 - 40 - 20 0
20 40 60 80 100 120 140 160
0
0
5
10
15
20
25
- V
GS
, Drain-to-Source Voltage (V)
Fig. 1 - Typical Output Characteristics
10
T
J
, Junction Temperature (°C)
Fig. 4 - Normalized On-Resistance vs. Temperature
500
80 μs Pulse Width
- 10 V
- I
D
, Drain Current (A)
8
Capacitance (pF)
-8V
400
V
GS
= 0 V, f = 1 MHz
C
iss
= C
gs
+ C
gd
, C
ds
Shorted
C
rss
= C
gd
C
oss
= C
ds
+ C
gd
C
iss
6
-7V
300
4
V
GS
= - 6 V
200
C
oss
100
C
rss
2
-5V
-4V
0
0
1
2
3
4
5
0
1
10
100
- V
GS
, Drain-to-Source Voltage (V)
Fig. 2 - Typical Output Characteristics
- V
GS
, Drain-to-Source Voltage (V)
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
10
20
- V
GS
,
Gate-to-Source
Voltage (V)
80 μs Pulse Width
V
DS
= 2 x V
GS
I
D
= - 4.7 A
16
V
DS
= - 40 V
12
- I
D
, Drain Current (A)
1
0.1
T
J
= 150 °C
T
J
= 25 °C
8
0.01
4
For Test Circuit
See
Figure 13
0
0
3
6
9
12
15
0.001
0
3
4
6
8
10
- V
GS
, Drain-to-Source Voltage (V)
Fig. 3 - Typical Transfer Characteristics
Q
g
, Total
Gate
Charge (nC)
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
Document Number: 91405
S10-0998-Rev. A, 26-Apr-10
www.vishay.com
3
IRFD9010, SiHFD9010
Vishay Siliconix
100
2.0
- I
SD
, Reverse Drain Current (A)
10
T
J
= 150 °C
- I
D
, Drain Current (A)
1.6
1.2
0.8
1
T
J
= 25 °C
0.4
0.1
0
1
2
3
4
5
0
25
50
75
100
125
150
- V
SD
,
Source-to-Drain
Voltage (V)
Fig. 7 - Typical Source-Drain Diode Forward Voltage
T
C
, Case Temperature (°C)
Fig. 9 - Maximum Drain Current vs. Case Temperature
100
Operation in this Area Limited
by R
DS(on)
V
DS
10 μs
100 μs
1 ms
1
10 ms
0.1
T
C
= 25 °C
T
J
= 150 °C
Single
Pulse
1
10
100 ms
1
s
DC
100
t
d(on)
V
GS
10 %
t
r
- 10 V
Pulse width
≤
1
µs
Duty factor
≤
0.1 %
R
D
- I
D
, Drain Current (A)
10
V
GS
R
g
D.U.T.
+
-
t
d(off)
t
f
V
DD
Fig. 10a - Switching Time Test Circuit
0.01
- V
DS
, Drain-to-Source Voltage (V)
Fig. 8 - Maximum Safe Operating Area
90 %
V
DS
Fig. 10b - Switching Time Waveforms
www.vishay.com
4
Document Number: 91405
S10-0998-Rev. A, 26-Apr-10
IRFD9010, SiHFD9010
Vishay Siliconix
1000
Thermal Response (Z
DthJC
)
100
0.5
0.2
0.1
0.05
0.02
10
P
DM
t
1
1
0.01
Single
Pulse
(Thermal Response)
t
2
Notes:
1. Duty Factor, D = t
1
/t
2
2. Peak T
J
= P
DM
x T
thJC
+ T
C
0.01
0.1
1
10
100
0.1
0.00001
0.0001
0.001
t
1
, Rectangular Pulse Duration (s)
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
L
Vary t
p
to obtain
required I
AS
R
g
V
DS
- 10 V
D.U.T
I
AS
Q
G
-
+ V
DD
Q
GS
Q
GD
- 10 V
t
p
0.01
W
V
G
Charge
Fig. 12a - Unclamped Inductive Test Circuit
Fig. 13a - Basic Gate Charge Waveform
Current regulator
Same type as D.U.T.
I
AS
50 kΩ
12 V
0.2
µF
0.3
µF
V
DD
t
p
V
DS
I
G
I
D
Current sampling resistors
V
GS
- 3 mA
Fig. 12b - Unclamped Inductive Waveforms
Fig. 13b - Gate Charge Test Circuit
Document Number: 91405
S10-0998-Rev. A, 26-Apr-10
+
D.U.T.
-
V
DS
V
DS
www.vishay.com
5
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