Data Sheet No. PD94713
IR3637SPBF
1% ACCURATE SYNCHRONOUS PWM CONTROLLER
FEATURES
0.8V Reference Voltage
Operates with a single 5V Supply Voltage
Internal 400kHz Oscillator
Soft-Start Function
Fixed Frequency Voltage Mode
Short Circuit Protection
DESCRIPTION
The IR3637 controller IC is designed to provide a simple
synchronous Buck regulator for on-board DC to DC ap-
plications in a small 8-pin SOIC. The output voltage can
be precisely regulated using the internal 0.8V reference
voltage for low voltage applications.
The IR3637 operates at a fixed internal 400kHz switch-
ing frequency to reduce the component size.
The device features under-voltage lockout for both input
supplies, an external programmable soft-start function
as well as output under-voltage detection that latches
off the device when an output short is detected.
APPLICATIONS
Computer Peripheral Voltage Regulator
Memory Power supplies
Graphics Card
Low cost on-board DC to DC
TYPICAL APPLICATION
12V
C3
5V
C2
C1
Vc
Vcc
HDrv
Q1
D1
L1
Vout
Q2
C6
SS/SD
C4
IR3637
LDrv
Comp
Fb
Gnd
R1
C5
R3
R2
Figure 1 - Typical application of IR3637.
ORDERING INFORMATION
PKG
DESIG
S
S
PACKAGE
PIN
PARTS
PARTS
T&R
DESCRIPTION COUNT PER TUBE PER REEL
Oriantation
IR3637SPBF
8
95
------
Fig A
IR3637STRPBF
8
-------
2500
Rev. 1.1
06/16/05
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1
IR3637SPBF
ABSOLUTE MAXIMUM RATINGS
Vcc Supply Voltage ................................................
Vc Supply Voltage ..................................................
Storage Temperature Range .....................................
Operating Junction Temperature Range .....................
ESD Classification .................................................
Moisture Sensitivity Level ........................................
16V
25V
-65°C To 150°C
0°C To 125°C
HMB Class 2 (2KV) JEDEC Standard
JEDEC Level 1 @ 260°C
Caution:
Stresses above those listed in “Absolute Maximum Rating” may cause permanent damage to the device. These are stress
ratings only and function of the device at these or any other conditions beyond those indicated in the operational sections of the specifica-
tions is not implied. Exposure to “Absolute Maximum Rating” conditions for extended periods may affect device reliability
PACKAGE INFORMATION
Fb
1
Vcc
2
LDrv
3
Gnd
4
8
SS/SD
7
Comp
6
Vc
5
HDrv
Recommended Operating Conditions
Parameter
Vcc
Vc
Min
4.5
8
Max
5.5
14
Units
V
V
θ
JA
=154°C/W
θ
JC
=41.2°C/W
ELECTRICAL SPECIFICATIONS
Unless otherwise specified, these specifications apply over Vcc=5V, Vc=12V and 0°C<Tj<125°C.
PARAMETER
Feedback Voltage
Fb Voltage
SYM
V
FB
TEST CONDITION
25°C<Tj<75°C
0°C<Tj<125°C
4.5<Vcc<5.5
Supply Ramping Up
Supply Ramping Up
Fb Ramping Down
Freq=400kHz, C
L
=1500pF
Freq=400kHz, C
L
=1500pF
SS=0V
SS=0V
SS=0V
Note1
MIN
0.792
0.789
TYP
0.800
0.800
MAX
0.808
0.811
0.1
UNITS
V
V
%
V
V
V
V
V
mA
mA
mA
mA
µA
V
Fb Voltage Line Regulation
UVLO
UVLO Threshold - Vcc
UVLO Hysteresis - Vcc
UVLO Threshold - Vc
UVLO Hysteresis - Vc
UVLO Threshold - Fb
Supply Current
Vcc Dynamic Supply Current
Vc Dynamic Supply Current
Vcc Static Supply Current
Vc Static Supply Current
Soft-Start Section
Charge Current
Shutdown Threshold
L
REG
UVLO Vcc
UVLO Vc
UVLO Fb
Dyn Icc
Dyn Ic
I
CCQ
I
CQ
SS
IB
SD
4.0
3.1
0.3
4
6
1
0.5
-15
4.2
0.25
3.3
0.2
0.4
8
15
3.3
1
-25
4.4
3.5
0.5
16
20
6
4.7
-35
0.4
Note1: Guaranteed by design. Not production tested.
2
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Rev.1.1
06/16/05
IR3637SPBF
PARAMETER
Error Amp
Fb Voltage Input Bias Current
Fb Voltage Input Bias Current
Transconductance
Oscillator
Frequency
Ramp-Amplitude Voltage
Output Drivers
Rise Time, Hdrv, Ldrv
Fall Time,Hdrv, Ldrv
Dead Band Time
Max Duty Cycle
Min Duty Cycle
SYM
I
FB1
I
FB2
TEST CONDITION
SS=3V, Fb=0.6V
SS=0V, Fb=0.6V
MIN
TYP
-0.1
-64
600
400
1.25
MAX
UNITS
µA
µA
µmho
kHz
V
g
m
Freq
V
RAMP
T
r
T
f
T
DB
T
ON
T
OFF
450
360
800
440
C
L
=1500pF, Vcc=12V,2V to 9V
C
L
=1500pF, Vcc=12V, 9V to 2V
Vcc=12V, 2V to 2V
Fb=0.6V, Freq=400kHz
Fb=1V
40
81
30
30
150
85
60
60
200
0
ns
ns
ns
%
%
PIN DESCRIPTIONS
PIN#
1
PIN SYMBOL
PIN DESCRIPTION
This pin is connected directly to the output of the switching regulator via resistor divider to
Fb
set the output voltage and provide feedback to the error amplifier.
Vcc
This pin provides biasing for the internal blocks of the IC as well as powers the low side
driver. A minimum of 0.1µF, high frequency capacitor must be connected from this pin to
ground to provide peak drive current capability.
Output driver for the synchronous power MOSFET.
IC's ground pin. This pin must be connected directly to the ground plane. A high frequency
capacitor (0.1 to 1µF) must be connected from Vcc and Vc pins to this pin for noise free
operation.
Output driver for the high side power MOSFET. The negative voltage at this pin may cause
instability for the gate drive circuit. To prevent this, a low forward voltage drop diode (e.g.
BAT54 or 1N4148) is required between this pin and ground.
This pin is connected to a voltage that must be at least 4V higher than the bus voltage
(assuming 5V threshold MOSFET) and powers the high side output driver. A minimum of
0.1µF, high frequency capacitor must be connected from this pin to ground to provide
peak drive current capability.
Compensation pin of the error amplifier. An external resistor and capacitor network is
typically connected from this pin to ground to provide loop compensation.
This pin provides user programmable soft-start function. Connect an extrnal capacitor
from this pin to ground to set the start up time of the output. The converter can be shut-
down by pulling this pin below 0.4V. During shutdown the upper FET is turned off and the
lower FET is turned on.
2
3
4
LDrv
Gnd
5
HDrv
6
Vc
7
Comp
8
SS / SD
Rev. 1.1
06/16/05
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3
IR3637SPBF
BLOCK DIAGRAM
Vcc
Bias
Generator
3V
0.8V
POR
4.2V
3V
Vc
25uA
3.3V
SS/SD 8
POR
0.8V
Error Comp
25K
25K
0.4V
Comp 7
POR
FbLo Comp
Error Amp
R
Reset Dom
Q
64uA Max
Ct
Oscillator
S
6 Vc
5 HDrv
2 Vcc
3 LDrv
Fb 1
4 Gnd
Figure 2 - Simplified block diagram of the IR3637.
THEORY OF OPERATION
Introduction
The IR3637 is a fixed frequency, voltage mode synchro-
nous controller and consists of a precision reference
voltage, an error amplifier, an internal oscillator, a PWM
comparator, 0.5A peak gate driver, soft-start and shut-
down circuits (see Block Diagram).
The output voltage of the synchronous converter is set
and controlled by the output of the error amplifier; this is
the amplified error signal from the sensed output voltage
and the reference voltage.
This voltage is compared to a fixed frequency linear
sawtooth ramp and generates fixed frequency pulses of
variable duty-cycle, which drives the two N-channel ex-
ternal MOSFETs.The timing of the IC is provided through
an internal oscillator circuit which uses on-chip capaci-
tor to set the oscillation frequency to 400kHz.
Short-Circuit Protection
The output is protected against the short-circuit. The
IR3637 protects the circuit for shorted output by sens-
ing the output voltage (through the external resistor di-
vider). The IR3637 shuts down the PWM signals, when
the output voltage drops below 0.4V.
Under-Voltage Lockout
The under-voltage lockout circuit assures that the
MOSFET driver outputs remain in the off state whenever
the supply voltage drops below set parameters. Lockout
occurs if Vc or Vcc fall below 3.3V and 4.2V respec-
tively. Normal operation resumes once Vc and Vcc rise
above the set values.
Shutdown
The converter can be shutdown by pulling the soft-start
pin below 0.4V. This can be easily done by using an
external small signal transistor. During shutdown the con-
trol MOSFET driver is turned off and the synchronous
MOSFET driver is turned on.
4
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Rev.1.1
06/16/05
IR3637SPBF
THEORY OF OPERATION
Soft-Start
The IR3637 has a programmable soft-start to control the
output voltage rise and limit the current surge at the start-
up. To ensure correct start-up, the soft-start sequence
initiates when the Vc and Vcc rise above their threshold
(3.3V and 4.2V respectively) and generates the Power
On Reset (POR) signal. Soft-start function operates by
sourcing an internal current to charge an external ca-
pacitor to about 3V. Initially, the soft-start function clamps
the E/A’s output of the PWM converter and disables the
short circuit protection. During the power up, the output
starts at zero and voltage at Fb is below 0.4V. The feed-
back UVLO is disabled during this time by injecting a
current (64µA) into the Fb. This generates a voltage
about 1.6V (64µA×25K) across the negative input of E/
A and positive input of the feedback UVLO comparator
(see Figure 3).
The magnitude of this current is inversely proportional to
the voltage at soft-start pin.
The 20µA current source starts to charge up the exter-
nal capacitor. In the mean time, the soft-start voltage
ramps up, the current flowing into Fb pin starts to de-
crease linearly and so does the voltage at the positive
pin of feedback UVLO comparator and the voltage nega-
tive input of E/A.
When the soft-start capacitor is around 1V, the current
flowing into the Fb pin is approximately 32µA. The volt-
age at the positive input of the E/A is approximately:
32µA×25K = 0.8V
The E/A will start to operate and the output voltage starts
to increase. As the soft-start capacitor voltage contin-
ues to go up, the current flowing into the Fb pin will keep
decreasing. Because the voltage at pin of E/A is regu-
lated to reference voltage 0.8V, the voltage at the Fb is:
V
FB
= 0.8-25K×(Injected Current)
The feedback voltage increases linearly as the injecting
current goes down. The injecting current drops to zero
when soft-start voltage is around 2V and the output volt-
age goes into steady state.
As shown in Figure 4, the positive pin of feedback UVLO
comparator is always higher than 0.4V, therefore, feed-
back UVLO is not functional during soft-start.
25uA
SS/SD
3V
64uA
Max
HDrv
POR
Comp
0.8V
25K
Error Amp
LDrv
25K
Fb
0.4V
64uA
×
25K=1.6V
When SS=0
Feeback
UVLO Comp
POR
Figure 3 - Soft-start circuit for IR3637.
The output start-up time is the time period when soft-
start capacitor voltage increases from 1V to 2V. The start-
up time will be dependent on the size of the external
soft-start capacitor. The start-up time can be estimated
by:
25µA×T
START
/C
SS
= 2V-1V
For a given start up time, the soft-start capacitor can be
estimated as:
C
SS
≅
25µA×T
START
/1V
Output of UVLO
POR
3V
≅
2V
Soft-Start
Voltage
Current flowing
into Fb pin
≅
1V
0V
64uA
0uA
Voltage at negative input
≅
1.6V
of Error Amp and Feedback
UVLO comparator
0.8V
0.8V
Voltage at Fb pin
0V
Figure 4 - Theoretical operational waveforms
during soft-start.
Rev. 1.1
06/16/05
www.irf.com
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