®
ISL6596
Data Sheet
January 22, 2010
FN9240.1
Synchronous Rectified MOSFET Driver
The ISL6596 is a high frequency, MOSFET driver optimized
to drive two N-Channel power MOSFETs in a synchronous
buck converter topology. This driver combined with Intersil’s
Multi-Phase Buck PWM controllers forms a complete single-
stage core-voltage regulator solution with high efficiency
performance at high switching frequency for advanced
microprocessors.
The IC is biased by a single low voltage supply (5V),
minimizing driver switching losses in high MOSFET gate
capacitance and high switching frequency applications.
Each driver is capable of driving a 3nF load with less than
10ns rise/fall time. Bootstrapping of the upper gate driver is
implemented via an internal low forward drop diode,
reducing implementation cost, complexity, and allowing the
use of higher performance, cost effective N-Channel
MOSFETs. Adaptive shoot-through protection is integrated
to prevent both MOSFETs from conducting simultaneously.
The ISL6596 features 4A typical sink current for the lower
gate driver, enhancing the lower MOSFET gate hold-down
capability during PHASE node rising edge, preventing power
loss caused by the self turn-on of the lower MOSFET due to
the high dV/dt of the switching node.
The ISL6596 also features an input that recognizes a
high-impedance state, working together with Intersil
multi-phase 3.3V or 5V PWM controllers to prevent negative
transients on the controlled output voltage when operation is
suspended. This feature eliminates the need for the schottky
diode that may be utilized in a power system to protect the
load from negative output voltage damage.
Features
• Drives Two N-Channel MOSFETs
• Adaptive Shoot-Through Protection
• 0.4Ω On-Resistance and 4A Sink Current Capability
• Supports High Switching Frequency
• Fast Output Rise and Fall Time
• Low Tri-State Hold-Off Time (20ns)
• Support 3.3V and 5V PWM Input
• Low Quiescent Supply Current
• Power-On Reset
• Expandable Bottom Copper Pad for Heat Spreading
• Dual Flat No-Lead (DFN) Package
- Compliant to JEDEC PUB95 MO-220 QFN-Quad Flat
No Leads-Product Outline
- Near Chip-Scale Package Footprint; Improves PCB
Efficiency and Thinner in Profile
• Pb-Free (RoHS Compliant)
Ordering Information
PART
NUMBER
(Note)
ISL6596CBZ*
ISL6596CRZ*
ISL6596IBZ*
ISL6596IRZ*
PART
MARKING
6596 CBZ
596Z
6596 IBZ
96IZ
TEMP
RANGE
(°C)
PACKAGE
PKG.
DWG. #
M8.15
0 to +70 8 Ld SOIC
0 to +70 10 Ld 3x3 DFN L10.3x3C
-40 to +85 8 Ld SOIC
M8.15
Applications
• Core Voltage Supplies for Intel® and AMD®
Microprocessors
• High Frequency Low Profile High Efficiency DC/DC
Converters
• High Current Low Voltage DC/DC Converters
• Synchronous Rectification for Isolated Power Supplies
-40 to +85 10 Ld 3x3 DFN L10.3x3C
*Add “-T” suffix for tape and reel. Please refer to TB347 for details on
reel specifications.
NOTE: These Intersil Pb-free plastic packaged products employ
special Pb-free material sets, molding compounds/die attach
materials, and 100% matte tin plate plus anneal (e3 termination finish,
which is RoHS compliant and compatible with both SnPb and Pb-free
soldering operations). Intersil Pb-free products are MSL classified at
Pb-free peak reflow temperatures that meet or exceed the Pb-free
requirements of IPC/JEDEC J STD-020.
Related Literature
• Technical Brief TB389 “PCB Land Pattern Design and
Surface Mount Guidelines for QFN (MLFP) Packages”
• Technical Brief TB363 “Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)”
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2005, 2010. All Rights Reserved
Intel® is a registered trademark of Intel Corporation.
AMD® is a registered trademark of Advanced Micro Devices, Inc.
ISL6596
Absolute Maximum Ratings
Supply Voltage (VCC, VCTRL) . . . . . . . . . . . . . . . . . . . -0.3V to 7V
Input Voltage (V
EN
, V
PWM
) . . . . . . . . . . . . . . . -0.3V to VCC + 0.3V
BOOT Voltage (V
BOOT-GND
). . . -0.3V to 25V (DC) or 36V (<200ns)
BOOT To PHASE Voltage (V
BOOT-PHASE
) . . . . . . -0.3V to 7V (DC)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 9V (<10ns)
PHASE Voltage . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to 15V (DC)
. . . . . . . . . GND -8V (<20ns Pulse Width, 10µJ) to 30V (<100ns)
UGATE Voltage . . . . . . . . . . . . . . . . V
PHASE
- 0.3V (DC) to V
BOOT
. . . . . . . . . . . V
PHASE
- 5V (<20ns Pulse Width, 10µJ) to V
BOOT
LGATE Voltage . . . . . . . . . . . . . . . GND - 0.3V (DC) to VCC + 0.3V
. . . . . . . . . . GND - 2.5V (<20ns Pulse Width, 5µJ) to VCC + 0.3V
Ambient Temperature Range . . . . . . . . . . . . . . . . . .-40°C to +125°C
HBM ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2kV
Thermal Information
Thermal Resistance
θ
JA
(°C/W)
θ
JC
(°C/W)
SOIC Package (Note 1) . . . . . . . . . . . . 110
N/A
DFN Package (Notes 2, 3) . . . . . . . . . . 48
7
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +150°C
Maximum Storage Temperature Range . . . . . . . . . .-65°C to +150°C
Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Recommended Operating Conditions
Ambient Temperature Range. . . . . . . . . . . . . . . . . .-40°C to +100°C
Maximum Operating Junction Temperature. . . . . . . . . . . . . . +125°C
Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5V
±10%
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTES:
1.
θ
JA
is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
2.
θ
JA
is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features.
3.
θ
JC
, "case temperature" location is at the center of the package underside exposed pad. See Tech Brief TB379 for details.
Electrical Specifications
These specifications apply for “Recommended Operating Conditions” on page 4, unless otherwise
noted.
SYMBOL
TEST CONDITIONS
MIN
MAX
(Note 5) TYP (Note 5) UNITS
PARAMETER
VCC SUPPLY CURRENT
Bias Supply Current
POR Rising
POR Falling
Hysteresis
VCTRL INPUT
Rising Threshold
Falling Threshold
PWM INPUT
Sinking Impedance
Source Impedance
Tri-State LowerThreshold
I
VCC
PWM pin floating, V
VCC
= 5V
-
-
2.2
-
190
3.4
3.0
400
-
4.2
-
-
µA
mV
-
2.4
2.75
2.65
2.90
-
V
V
R
PWM_SNK
R
PWM_SRC
V
VCTRL
= 3.3V (-110mV Hysteresis)
V
VCTRL
= 5V (-250mV Hysteresis)
-
-
-
-
-
-
-
3.5
3.5
1.1
1.5
1.9
3.25
20
-
-
-
-
-
-
-
kΩ
kΩ
V
V
V
V
ns
Tri-State Upper Threshold
V
VCTRL
= 3.3V (+110mV Hysteresis)
V
VCTRL
= 5V (+250mV Hysteresis)
Tri-State Shutdown Holdoff Time
SWITCHING TIME
(See Figure 1 on page 6)
UGATE Rise Time (Note 4)
LGATE Rise Time (Note 4)
UGATE Fall Time (Note 4)
LGATE Fall Time (Note 4)
UGATE Turn-Off Propagation Delay
LGATE Turn-Off Propagation Delay
UGATE Turn-On Propagation Delay
t
TSSHD
t
PDLU
or t
PDLL
+ Gate Falling Time
t
RU
t
RL
t
FU
t
FL
t
PDLU
t
PDLL
t
PDHU
V
VCC
= 5V, 3nF Load
V
VCC
= 5V, 3nF Load
V
VCC
= 5V, 3nF Load
V
VCC
= 5V, 3nF Load
V
VCC
= 5V, Outputs Unloaded
V
VCC
= 5V, Outputs Unloaded
V
VCC
= 5V, Outputs Unloaded
-
-
-
-
-
-
-
8.0
8.0
8.0
4.0
20
15
19
-
-
-
-
-
-
-
ns
ns
ns
ns
ns
ns
ns
4
FN9240.1
January 22, 2010
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