74ACT16541
16-BIT BUS BUFFER
WITH 3-STATE OUTPUTS (NON INVERTED)
s
s
s
s
s
s
s
HIGH SPEED: t
PD
= 4.8ns (TYP.) at V
CC
= 5V
LOW POWER DISSIPATION:
I
CC
= 8µA(MAX.) at T
A
=25°C
COMPATIBLE WITH TTL OUTPUTS
V
IH
= 2V (MIN.), V
IL
= 0.8V (MAX.)
50Ω TRANSMISSION LINE DRIVING
CAPABILITY
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 24mA (MIN)
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 4.5V to 5.5V
IMPROVED LATCH-UP IMMUNITY
TSSOP
ORDER CODES
PACKAGE
TSSOP
-
et
l
)
(s
so
b
ct
u
d
-O
ro
s)
P
t(
te
uc
le
o
od
r
s
P
b
O
te
le
so
b
O
DESCRIPTION
The 74ACT16541 is an advanced high-speed
CMOS 16-BIT BUS BUFFER (3-STATE)
fabricated with sub-micron silicon gate and
double-layer metal wiring C
2
MOS tecnology.
This is composed of two 8-bit sections with
separate output-enable signals. For either 8-bit
buffers section, the 3 STATE control gate
operates as a two input AND such that if either
nG1 and nG2 are high, all outputs are in the high
impedence state.
This device is designed to interface directly High
Speed CMOS systems with TTL and NMOS
components.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
PIN CONNECTION
b
O
so
te
le
ro
P
TUBE
uc
d
s)
t(
T&R
P
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od
r
s)
t(
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74ACT16541TTR
February 2003
1/9
74ACT16541
ABSOLUTE MAXIMUM RATINGS
Symbol
V
CC
V
I
V
O
I
IK
I
OK
I
O
Supply Voltage
DC Input Voltage
DC Output Voltage
DC Input Diode Current
DC Output Diode Current
DC Output Current
Parameter
Value
-0.5 to +7
-0.5 to V
CC
+ 0.5
-0.5 to V
CC
+ 0.5
±
20
±
20
±
50
±
400
-65 to +150
300
Unit
V
V
V
mA
mA
mA
mA
I
CC
or I
GND
DC V
CC
or Ground Current
Storage Temperature
T
stg
T
L
Lead Temperature (10 sec)
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied.
RECOMMENDED OPERATING CONDITIONS
Symbol
V
CC
V
I
V
O
T
op
dt/dv
Supply Voltage
Input Voltage
Output Voltage
Operating Temperature
Parameter
Input Rise and Fall Time V
CC
= 4.5 to 5.5V (note 1)
1) V
IN
from 0.8V to 2.0V
ro
s)
P
t(
te
uc
le
o
od
r
s
P
b
O
te
le
so
b
O
uc
d
s)
t(
O
-
so
b
te
le
r
P
d
o
Value
8
ct
u
s)
(
°C
°C
4.5 to 5.5
0 to V
CC
0 to V
CC
so
b
-O
te
le
r
P
-55 to 125
od
s)
t(
uc
Unit
V
V
V
°C
ns/V
3/9
74ACT16541
DC SPECIFICATIONS
Test Condition
Symbol
Parameter
V
CC
(V)
4.5
5.5
4.5
5.5
4.5
5.5
4.5
5.5
V
OL
Low Level Output
Voltage
4.5
5.5
4.5
5.5
I
I
I
OZ
Input Leakage Cur-
rent
High Impedance
Output Leakege
Current
Max I
CC
/Input
Quiescent Supply
Current
5.5
5.5
5.5
V
O
= 0.1 V or
V
CC
-0.1V
V
O
= 0.1 V or
V
CC
-0.1V
I
O
=-50
µA
I
O
=-50
µA
I
O
=-24 mA
I
O
=-24 mA
I
O
=50
µA
I
O
=50
µA
I
O
=24 mA
I
O
=24 mA
V
I
= V
CC
or GND
V
I
= V
IH
or V
IL
V
O
= V
CC
or GND
V
I
= V
CC
- 2.1V
4.4
5.4
3.86
4.86
0.001
0.001
0.1
0.1
0.36
0.36
T
A
= 25°C
Min.
2.0
2.0
Typ.
1.5
1.5
1.5
1.5
4.49
5.49
Max.
Value
-40 to 85°C
Min.
2.0
2.0
0.8
0.8
4.4
5.4
3.76
4.76
0.1
0.1
0.8
0.8
4.4
5.4
3.7
Max.
-55 to 125°C
Min.
2.0
2.0
0.8
0.8
V
Max.
V
Unit
V
IH
V
IL
V
OH
High Level Input
Voltage
Low Level Input
Voltage
High Level Output
Voltage
-
et
l
)
(s
so
b
ct
u
d
-O
ro
s)
P
t(
te
uc
le
o
od
r
s
P
b
O
te
le
so
b
O
0.6
I
CC
5.5
5.5
V
I
= V
CC
or GND
8
I
OLD
I
OHD
Dynamic Output
Current (note 1, 2)
V
OLD
= 1.65 V max
V
OHD
= 3.85 V min
Test Condition
Symbol
Parameter
V
CC
(V)
T
A
= 25°C
Typ.
3.1
4.8
6.5
5.7
6.0
5.3
Min.
t
PLH
t
PHL
Propagation Delay
Time
Output Enable
Time
5.0
(*)
5.0
(*)
5.0
(*)
t
PZL
t
PLZ
t
PZH
t
PHZ
Output Disable
Time
(*) Voltage range is 5.0V
±
0.5V
I
CCT
b
O
so
te
le
±
0.1
±
0.5
r
P
0.44
0.44
±
1
d
o
±
5
1.5
80
75
-75
uc
4.7
s)
t(
0.1
0.1
V
0.5
0.5
±
1
µA
P
e
od
r
s)
t(
uc
±
5
1.6
80
50
-50
µA
mA
µA
mA
mA
1) Maximum test duration 2ms, one output loaded at time
2) Incident wave switching is guaranteed on transmission lines with impedances as low as 50Ω
AC ELECTRICAL CHARACTERISTICS
(C
L
= 50 pF, R
L
= 500
Ω,
Input t
r
= t
f
= 3ns)
Value
-40 to 85°C
Min.
Max.
9
9.2
11.0
10.0
10.7
9.7
-55 to 125°C
Min.
Max.
9
9.2
11.0
10.0
10.7
9.7
ns
ns
ns
Unit
Max.
4.6
6.8
9.2
8.0
7.9
6.8
4/9
74ACT16541
CAPACITIVE CHARACTERISTICS
Test Condition
Symbol
Parameter
V
CC
(V)
5.0
5.0
5.0
f
IN
= 10MHz
T
A
= 25°C
Min.
Typ.
3.7
13
25
Max.
Value
-40 to 85°C
Min.
Max.
-55 to 125°C
Min.
Max.
pF
pF
pF
Unit
C
IN
C
OUT
C
PD
Input Capacitance
Output Capaci-
tance
Power Dissipation
Capacitance (note
1)
1) C
PD
is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I
CC(opr)
= C
PD
x V
CC
x f
IN
+ I
CC
/16 (per
circuit)
TEST CIRCUIT
-
et
l
)
(s
so
b
ct
u
d
-O
ro
s)
P
t(
te
uc
le
o
od
r
s
P
b
O
te
le
so
b
O
Test
t
PLH,
t
PHL
t
PZL,
t
PLZ
t
PZH,
t
PHZ
C
L
= 50pF or equivalent (includes jig and probe capacitance)
R
L
= R
1
= 500Ω or equivalent
R
T
= Z
OUT
of pulse generator (typically 50Ω)
b
O
so
te
le
ro
P
uc
d
s)
t(
P
e
od
r
s)
t(
uc
Switch
Open
2V
CC
GND
5/9
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