19-1319; Rev 3; 7/08
KIT
ATION
EVALU
BLE
AVAILA
2x4-Channel, Simultaneous-Sampling
14-Bit DAS
General Description
Features
♦
Four Simultaneous-Sampling T/H Amplifiers with
Two Multiplexed Inputs (eight single-ended inputs
total)
♦
3µs Conversion Time per Channel
♦
Throughput: 250ksps (1 channel)
142ksps (2 channels)
100ksps (3 channels)
76ksps (4 channels)
♦
Input Range: ±5V (MAX125)
±2.5V (MAX126)
♦
Fault-Protected Input Multiplexer (±17V)
♦
±5V Supplies
♦
Internal +2.5V or External Reference Operation
♦
Programmable On-Board Sequencer
♦
High-Speed Parallel DSP Interface
MAX125/MAX126
The MAX125/MAX126 are high-speed, multichannel,
14-bit data-acquisition systems (DAS) with simultaneous
track/holds (T/Hs). These devices contain a 14-bit, 3µs,
successive-approximation analog-to-digital converter
(ADC), a +2.5V reference, a buffered reference input,
and a bank of four simultaneous-sampling T/H ampli-
fiers that preserve the relative phase information of the
sampled inputs. The MAX125/MAX126 have two multi-
plexed inputs for each T/H, allowing a total of eight
inputs. In addition, the converter is overvoltage tolerant
to ±17V; a fault condition on any channel will not harm
the IC. Available input ranges are ±5V (MAX125) and
±2.5V (MAX126).
An on-board sequencer converts one to four channels
per
CONVST
pulse. In the default mode, one T/H output
(CH1A) is converted. An interrupt signal (INT) is provided
after the last conversion is complete. Convert two,
three, or four channels by reprogramming the
MAX125/MAX126 through the bidirectional parallel
interface. Once programmed, the MAX125/MAX126
continue to convert the specified number of channels
per
CONVST
pulse until they are reprogrammed. The
channels are converted sequentially, beginning with
CH1. The
INT
signal always follows the end of the last
conversion in a conversion sequence. The ADC con-
verts each assigned channel in 3µs and stores the
result in an internal 14x4 RAM. Upon completion of the
conversions, data can be accessed by applying suc-
cessive pulses to the
RD
pin. Four successive reads
access four data words sequentially.
The parallel interface’s data-access and bus-release
timing specifications are compatible with most popular
digital signal processors and 16-bit/32-bit microproces-
sors, so the MAX125/MAX126 conversion results can
be accessed without resorting to wait states.
Ordering Information
PART
MAX125CCAX
MAX125CEAX
MAX126CCAX
MAX126CEAX
TEMP RANGE
0°C to +70°C
-40°C to +85°C
0°C to +70°C
-40°C to +85°C
PIN-PACKAGE
36 SSOP
36 SSOP
36 SSOP
36 SSOP
INL
(LSB)
±4
±4
±4
±4
Applications
Multiphase Motor Control
Power-Grid Synchronization
Power-Factor Monitoring
Digital Signal Processing
Vibration and Waveform Analysis
Typical Operating Circuit appears at end of data sheet.
Pin Configuration appears at end of data sheet.
________________________________________________________________
Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
2x4-Channel, Simultaneous-Sampling
14-Bit DAS
MAX125/MAX126
ABSOLUTE MAXIMUM RATINGS
AV
DD
to AGND ...........................................................-0.3V to 6V
AV
SS
to AGND ............................................................0.3V to -6V
DV
DD
to DGND ...........................................................-0.3V to 6V
AGND to DGND .......................................................-0.3V to 0.3V
CH_ _ to AGND....................................................................±17V
REFIN, REFOUT to AGND ..........................................-0.3V to 6V
Digital Inputs/Outputs to DGND ..............-0.3V to (DV
DD
+ 0.3V)
Continuous Power Dissipation (T
A
= +70°C)
SSOP (derate 11.8mW/°C above +70°C) ....................941mW
Operating Temperature Ranges
MAX125CCAX/MAX126CCAX ............................0°C to +70°C
MAX125CEAX/MAX126CEAX ..........................-40°C to +85°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10sec)................................300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(AV
DD
= +5V ±5%, AV
SS
= -5V ±5%, DV
DD
= +5V ±5%, V
REFIN
= 2.5V, AGND = DGND = 0V, 4.7µF capacitor from REFOUT to
AGND, 0.1µF capacitor from REFIN to AGND, f
CLK
= 16MHz, external clock, 50% duty cycle, T
A
= T
MIN
to T
MAX
, unless otherwise
noted.)
PARAMETER
DC ACCURACY (Note 1)
Resolution
Integral Nonlinearity
No Missing Codes
Bipolar Zero Error
Bipolar Zero-Error Match
Zero-Code Tempco
Gain Error
Gain-Error Match
Gain-Error Tempco
DYNAMIC PERFORMANCE (f
CLK
= 16MHz, f
IN
= 10.06kHz (Notes 1, 3)
Signal-to-Noise Plus Distortion
Total Harmonic Distortion
Spurious-Free Dynamic Range
Channel-to-Channel Isolation
SINAD
THD
SFDR
Single-channel mode,
MAX125
channel 1A, 250ksps (Note
MAX126
4)
Single-channel mode, channel 1A,
250ksps (Notes 4, 5)
Single-channel mode, channel 1A,
250ksps (Note 4)
Single-channel mode, channel 1A,
250ksps (Note 6)
72
70
75
72
-89
80
90
80
-80
dB
dB
dB
dB
T
A
= +25°C
T
A =
T
MIN
to T
MAX
Between all channels
1.2
±5
T
A
= +25°C
T
A =
T
MIN
to T
MAX
Between all channels
1.2
±5
±5
±10
±15
5
N
INL
All channels
(Note 2)
13
±5
±15
±25
5
14
±2
±4
Bits
LSB
Bits
mV
mV
ppm/°C
mV
mV
ppm/°C
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
2
_______________________________________________________________________________________
2x4-Channel, Simultaneous-Sampling
14-Bit DAS
ELECTRICAL CHARACTERISTICS (continued)
(AV
DD
= +5V ±5%, AV
SS
= -5V ±5%, DV
DD
= +5V ±5%, V
REFIN
= 2.5V, AGND = DGND = 0V, 4.7µF capacitor from REFOUT to
AGND, 0.1µF capacitor from REFIN to AGND, f
CLK
= 16MHz, external clock, 50% duty cycle, T
A
= T
MIN
to T
MAX
, unless otherwise
noted.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
ANALOG INPUT
Input Voltage Range
Input Current
Input Capacitance
TRACK/HOLD
Acquisition Time
Small-Signal Bandwidth
Full-Power Bandwidth
Droop Rate
Aperture Delay
Aperture Jitter
Aperture-Delay Matching
REFERENCE OUTPUT
(Note 8)
Output Voltage
External Load Regulation
REFOUT Tempco
External Capacitive
Bypass at REFIN
External Capacitive
Bypass at REFOUT
REFERENCE INPUT
Input Voltage Range
Input Current
Input Resistance
Input Capacitance
EXTERNAL CLOCK
External Clock Frequency
DIGITAL INPUTS
(CONVST,
RD, WR, CS,
CLK, A0–A3) (Note 1)
Input High Voltage
Input Low Voltage
Input Current
Input Capacitance
V
IH
V
IL
I
IN
C
IN
CONVST,
RD, WR, CS,
CLK
A0–A3
(Note 7)
2.4
0.8
±1
±10
15
V
V
µA
pF
0.1
16
MHz
REFIN = 2.5V
(Note 10)
(Note 7)
10
10
2.50 ±10%
±10
V
µA
kΩ
pF
V
REFOUT
T
A
= +25°C
0mA < I
LOAD
< 1mA
(Note 9)
0.1
4.7
22
2.475
2.500
±1
30
2.525
V
%
ppm/°C
µF
µF
t
ACQ
1
8
0.5
2
5
30
500
µs
MHz
MHz
mV/ms
ns
ps
RMS
ps
V
IN
I
IN
C
IN
MAX125
MAX126
MAX125, V
IN
= ±5V
MAX126, V
IN
= ±2.5V
(Note 7)
±5
±2.5
±667
16
V
µA
µA
pF
MAX125/MAX126
_______________________________________________________________________________________
3
2x4-Channel, Simultaneous-Sampling
14-Bit DAS
MAX125/MAX126
ELECTRICAL CHARACTERISTICS (continued)
(AV
DD
= +5V ±5%, AV
SS
= -5V ±5%, DV
DD
= +5V ±5%, V
REFIN
= 2.5V, AGND = DGND = 0V, 4.7µF capacitor from REFOUT to
AGND, 0.1µF capacitor from REFIN to AGND, f
CLK
= 16MHz, external clock, 50% duty cycle, T
A
= T
MIN
to T
MAX
, unless otherwise
noted.)
PARAMETER
Output High Voltage
Output Low Voltage
Three-State Leakage Current
Three-State Output
Capacitance
POWER REQUIREMENTS
Positive Supply Voltage
Negative Supply Voltage
Digital Supply Voltage
Positive Supply Current
Negative Supply Current
Digital Supply Current
Shutdown Positive Current
Shutdown Negative Current
Shutdown Digital Current
Positive Supply Rejection
Negative Supply Rejection
Power Dissipation
PSRR+
PSRR-
(Note 11)
(Note 11)
(Note 12)
165
±1
-1
3
±2
±2
250
AV
DD
AV
SS
DV
DD
I(AV
DD
)
I(AV
SS
)
I(DV
DD
)
-17
4.75
-5.25
4.75
5
-5
5
17
-13
3
5
3
5.25
-4.75
5.25
25
V
V
V
mA
mA
mA
mA
mA
mA
LSB
LSB
mW
SYMBOL
V
OH
V
OL
I
OUT
= 1mA
I
OUT
= -1.6mA
D0–D13
(Note 7)
CONDITIONS
MIN
4
0.4
±10
10
TYP
MAX
UNITS
V
V
µA
pF
DIGITAL OUTPUTS
(D0–D13,
INT)
(Note 1)
4
_______________________________________________________________________________________
2x4-Channel, Simultaneous-Sampling
14-Bit DAS
TIMING CHARACTERISTICS
(Figure 4)
(AV
DD
= +5V, AV
SS
= -5V, DV
DD
= +5V, AGND = DGND = 0V, T
A
= T
MIN
to T
MAX
, unless otherwise noted.)
PARAMETER
CONVST
Pulse Width
CS
to
WR
Setup Time
CS
to
WR
Hold Time
WR
Low Pulse Width
CS
to
CONVST
Delay
Address Setup Time
Address Hold Time
RD
to
INT
Delay
Delay Time Between Reads
CS
to
RD
Setup Time
CS
to
RD
Hold Time
RD
Low Pulse Width
Data-Access Time
Bus-Relinquish Time
SYMBOL
t
CW
t
CWS
t
CWH
t
WR
t
CSD
t
AS
t
AH
t
ID
t
RD
t
CRS
t
CRH
t
RD
t
DA
t
DH
25pF load (Note 13)
25pF load (Note 14)
Mode 1, 1 channel
Conversion Time
t
CONV
Mode 2, 2 channel
Mode 3, 3 channel
Mode 4, 4 channel
Mode 1, 1 channel
Conversion Rate/Channel
Mode 2, 2 channel
Mode 3, 3 channel
Mode 4, 4 channel
Start-Up Time
Exiting shutdown
5
5
25pF load
40
0
0
30
30
45
3
6
9
12
250
142
100
76
µs
ksps
µs
CONDITIONS
MIN
30
0
0
30
125
30
0
30
TYP
MAX
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MAX125/MAX126
Note 1:
AV
DD
= +5V, AV
SS
= -5V, DV
DD
= +5V, V
REFIN
= 2.500V (external), V
IN
= ±5V (MAX125) or ±2.5V (MAX126).
Note 2:
Relative accuracy is the analog value’s deviation at any code from its theoretical value after the full-scale range has been
calibrated.
Note 3:
CLK synchronized with
CONVST.
Note 4:
f
IN
= 10.06kHz, V
IN
= ±5V (MAX125) or ±2.5V (MAX126).
Note 5:
First five harmonics.
Note 6:
All inputs except CH1A driven with ±5V (MAX125) or ±2.5V (MAX126) 10kHz signal; CH1A connected to AGND and digitized.
Note 7:
Guaranteed by design. Not production tested.
Note 8:
AV
DD
= +5V, AV
SS
= -5V, DV
DD
= +5V, V
IN
= 0V (all channels).
Note 9:
Temperature drift is defined as the change in output voltage from +25°C to T
MIN
or T
MAX
. It is calculated as
TC = [∆REFOUT/REFOUT] /
∆T.
Note 10:
See Figure 2.
Note 11:
Defined as the change in positive full scale caused by a ±5% variation in the nominal supply voltage. Tested with one input
at full scale and all others at AGND. V
REFIN
= 2.5V (internal).
Note 12:
Tested with V
IN
= AGND on all channels, V
REFIN
= 2.5V (internal).
Note 13:
The data-access time is defined as the time required for an output to cross 0.8V or 2.0V. It is measured using the circuit of
Figure 1. The measured number is then extrapolated back to determine the value with a 25pF load.
Note 14:
The bus-relinquish time is derived from the measured time taken for the data outputs to change 0.5V when loaded with the
circuit of Figure 1. The measured number is then extrapolated back to remove the effects of charging/discharging the 120pF
capacitor. Thus, the time given is the part’s true bus-relinquish time, independent of the external bus loading capacitance.
_______________________________________________________________________________________
5
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