74F253 Dual 4-Input Multiplexer with 3-STATE Outputs
April 1988
Revised September 2000
74F253
Dual 4-Input Multiplexer with 3-STATE Outputs
General Description
The 74F253 is a dual 4-input multiplexer with 3-STATE out-
puts. It can select two bits of data from four sources using
common select inputs. The output may be individually
switched to a high impedance state with a HIGH on the
respective Output Enable (OE) inputs, allowing the outputs
to interface directly with bus oriented systems.
Features
s
Multifunction capability
s
Non-inverting 3-STATE outputs
Ordering Code:
Order Number
74F253SC
74F253SJ
74F253PC
Package Number
M16A
M16D
N16E
Package Description
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbols
Connection Diagram
IEEE/IEC
© 2000 Fairchild Semiconductor Corporation
DS009505
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74F253
Unit Loading/Fan Out
Pin Names
I
0a
–I
3a
I
0b
–I
3b
S
0
–S
1
OE
a
OE
b
Z
a
, Z
b
Description
Side A Data Inputs
Side B Data Inputs
Common Select Inputs
Side A Output Enable Input (Active LOW)
Side B Output Enable Input (Active LOW)
3-STATE Outputs
U.L.
HIGH/LOW
1.0/1.0
1.0/1.0
1.0/1.0
1.0/1.0
1.0/1.0
150/40(33.3)
Input I
IH
/I
IL
Output I
OH
/I
OL
20
µ
A/
−
0.6 mA
20
µ
A/
−
0.6 mA
20
µ
A/
−
0.6 mA
20
µ
A/
−
0.6 mA
20
µ
A/
−
0.6 mA
−
3 mA/24 mA (20 mA)
Functional Description
This device contains two identical 4-input multiplexers with
3-STATE outputs. They select two bits from four sources
selected by common Select inputs (S
0
, S
1
). The 4-input
multiplexers have individual Output Enable (OE
a
, OE
b
)
inputs which, when HIGH, force the outputs to a high
impedance (High Z) state. This device is the logic imple-
mentation of a 2-pole, 4-position switch, where the position
of the switch is determined by the logic levels supplied to
the two select inputs. The logic equations for the outputs
are shown below:
Z
a
=
OE
a
• (I
0a
• S
1
• S
0
+
I
1a
• S
1
• S
0
+
I
2a
• S
1
• S
0
+
I
3a
• S
1
• S
0
)
Z
b
=
OE
b
• (I
0b
• S
1
• S
0
+
I
1b
• S
1
• S
0
+
I
2b
• S
1
• S
0
+
I
3b
• S
1
• S
0
)
If the outputs of 3-STATE devices are tied together, all but
one device must be in the high impedance state to avoid
high currents that would exceed the maximum ratings.
Designers should ensure that Output Enable signals to
3-STATE devices whose outputs are tied together are
designed so that there is no overlap.
Truth Table
Select
Inputs
S
0
X
L
L
H
H
L
L
H
H
S
1
X
L
L
L
L
H
H
H
H
I
0
X
L
H
X
X
X
X
X
X
Data Inputs
I
1
X
X
X
L
H
X
X
X
X
I
2
X
X
X
X
X
L
H
X
X
I
3
X
X
X
X
X
X
X
L
H
Output
Enable
OE
H
L
L
L
L
L
L
L
L
Output
Z
Z
L
H
L
H
L
H
L
H
Address inputs S
0
and S
1
are common to both sections.
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
X
=
Immaterial
Z
=
High Impedance
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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2
74F253
Absolute Maximum Ratings
(Note 1)
Storage Temperature
Ambient Temperature under Bias
Junction Temperature under Bias
V
CC
Pin Potential to Ground Pin
Input Voltage (Note 2)
Input Current (Note 2)
Voltage Applied to Output
in HIGH State (with V
CC
=
0V)
Standard Output
3-STATE Output
Current Applied to Output
in LOW State (Max)
ESD Last Passing Voltage (Min)
twice the rated I
OL
(mA)
4000V
−
65
°
C to
+
150
°
C
−
55
°
C to
+
125
°
C
−
55
°
C to
+
150
°
C
−
0.5V to
+
7.0V
−
0.5V to
+
7.0V
−
30 mA to
+
5.0 mA
Recommended Operating
Conditions
Free Air Ambient Temperature
Supply Voltage
0
°
C to
+
70
°
C
+
4.5V to
+
5.5V
−
0.5V to V
CC
−
0.5V to
+
5.5V
Note 1:
Absolute maximum ratings are values beyond which the device
may be damaged or have its useful life impaired. Functional operation
under these conditions is not implied.
Note 2:
Either voltage limit or current limit is sufficient to protect inputs.
DC Electrical Characteristics
Symbol
V
IH
V
IL
V
CD
V
OH
Parameter
Input HIGH Voltage
Input LOW Voltage
Input Clamp Diode Voltage
Output HIGH
Voltage
10% V
CC
10% V
CC
5% V
CC
5% V
CC
V
OL
I
IH
I
BVI
I
CEX
V
ID
I
OD
I
IL
I
OZH
I
OZL
I
OS
I
ZZ
I
CCH
I
CCL
I
CCZ
Output LOW Voltage
Input HIGH
Current
Input HIGH Current
Breakdown Test
Output HIGH
Leakage Current
Input Leakage
Test
Output Leakage
Circuit Current
Input LOW Current
Output Leakage Current
Output Leakage Current
Output Short-Circuit Current
Bus Drainage Test
Power Supply Current
Power Supply Current
Power Supply Current
11.5
16
16
−60
−100
4.75
3.75
−0.6
50
−50
−150
−225
500
16
23
23
10% V
CC
2.5
2.4
2.7
2.7
0.5
5.0
7.0
50
V
µA
µA
µA
V
µA
mA
µA
µA
mA
µA
mA
mA
mA
Min
Max
Max
Max
0.0
0.0
Max
Max
Max
Max
0.0V
Max
Max
Max
V
Min
Min
2.0
0.8
−1.2
Typ
Max
Units
V
V
V
Min
V
CC
Conditions
Recognized as a HIGH Signal
Recognized as a LOW Signal
I
IN
= −18
mA
I
OH
= −1
mA
I
OH
= −3
mA
I
OH
= −1
mA
I
OH
= −3
mA
I
OL
=
24 mA
V
IN
=
2.7V
V
IN
=
7.0V
V
OUT
=
V
CC
I
ID
=
1.9
µA
All Other Pins Grounded
V
IOD
=
150 mV
All Other Pins Grounded
V
IN
=
0.5V
V
OUT
=
2.7V
V
OUT
=
0.5V
V
OUT
=
0V
V
OUT
=
0V
V
OUT
=
V
CC
V
O
=
HIGH
V
O
=
LOW
V
O
=
HIGH Z
3
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74F253
AC Electrical Characteristics
T
A
= +25°C
Symbol
Parameter
Min
t
PLH
t
PHL
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
Output Disable Time
Propagation Delay
S
n
to Z
n
Propagation Delay
I
n
to Z
n
Output Enable Time
4.5
3.0
3.0
2.5
3.0
3.0
2.0
2.0
V
CC
=
5.0V
C
L
=
50 pF
Typ
8.5
6.5
5.5
4.5
6.0
6.0
3.7
4.4
Max
11.5
9.0
7.0
6.0
8.0
8.0
5.0
6.0
T
A
= −55°C
to
+125°C
V
CC
=
5.0V
C
L
=
50 pF
Min
3.5
2.5
2.5
2.5
2.5
2.5
2.0
2.0
Max
15.0
11.0
9.0
8.0
10.0
10.0
6.5
8.0
T
A
=
0°C to
+70°C
V
CC
=
5.0V
C
L
=
50 pF
Min
4.5
3.0
3.0
2.5
3.0
3.0
2.0
2.0
Max
13.0
10.0
8.0
7.0
9.0
9.0
6.0
7.0
ns
ns
ns
Units
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4
74F253
Physical Dimensions
inches (millimeters) unless otherwise noted
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
Package Number M16A
5
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