PD - 97128
IRFP3306PbF
HEXFET
®
Power MOSFET
Applications
l
High Efficiency Synchronous Rectification in SMPS
l
Uninterruptible Power Supply
l
High Speed Power Switching
l
Hard Switched and High Frequency Circuits
G
Benefits
l
Improved Gate, Avalanche and Dynamic dV/dt
Ruggedness
l
Fully Characterized Capacitance and Avalanche
SOA
l
Enhanced body diode dV/dt and dI/dt Capability
l
Lead-Free
D
V
DSS
R
DS(on)
typ.
max.
I
D
(Silicon Limited)
I
D
(Package Limited)
D
60V
3.3m
:
4.2m
:
160A
c
120A
S
G
D
S
TO-247AC
G
D
S
Gate
Drain
Source
Absolute Maximum Ratings
Symbol
I
D
@ T
C
= 25°C
I
D
@ T
C
= 100°C
I
D
@ T
C
= 25°C
I
DM
P
D
@T
C
= 25°C
V
GS
dv/dt
T
J
T
STG
Parameter
Continuous Drain Current, V
GS
@ 10V (Silicon Limited)
Continuous Drain Current, V
GS
@ 10V (Silicon Limited)
Continuous Drain Current, V
GS
@ 10V (Wire Bond Limited)
Pulsed Drain Current
d
Maximum Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Peak Diode Recovery
f
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
(1.6mm from case)
Mounting torque, 6-32 or M3 screw
Max.
160c
110
120
620
220
1.5
± 20
14
-55 to + 175
300
10lbxin (1.1Nxm)
184
See Fig. 14, 15, 22a, 22b,
Units
A
W
W/°C
V
V/ns
°C
Avalanche Characteristics
E
AS (Thermally limited)
I
AR
E
AR
Single Pulse Avalanche Energy
e
Avalanche Current
d
Repetitive Avalanche Energy
g
mJ
A
mJ
Thermal Resistance
Symbol
R
θJC
R
θCS
R
θJA
Parameter
Junction-to-Case
k
Case-to-Sink, Flat Greased Surface
Junction-to-Ambient
jk
Typ.
–––
0.24
–––
Max.
0.67
–––
40
Units
°C/W
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1
3/3/08
IRFP3306PbF
Static @ T
J
= 25°C (unless otherwise specified)
Symbol
V
(BR)DSS
R
DS(on)
V
GS(th)
I
DSS
I
GSS
R
G
Parameter
Drain-to-Source Breakdown Voltage
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Internal Gate Resistance
Min. Typ. Max. Units
60
–––
–––
2.0
–––
–––
–––
–––
–––
–––
0.07
3.3
–––
–––
–––
–––
–––
0.7
–––
–––
4.2
4.0
20
250
100
-100
–––
Ω
nA
V
Conditions
V
GS
= 0V, I
D
= 250μA
ΔV
(BR)DSS
/ΔT
J
Breakdown Voltage Temp. Coefficient
V/°C Reference to 25°C, I
D
= 5mAd
mΩ V
GS
= 10V, I
D
= 75A
g
V
μA
V
DS
= V
GS
, I
D
= 150μA
V
DS
= 60V, V
GS
= 0V
V
DS
= 48V, V
GS
= 0V, T
J
= 125°C
V
GS
= 20V
V
GS
= -20V
Dynamic @ T
J
= 25°C (unless otherwise specified)
Symbol
gfs
Q
g
Q
gs
Q
gd
Q
sync
t
d(on)
t
r
t
d(off)
t
f
C
iss
C
oss
C
rss
Parameter
Forward Transconductance
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Total Gate Charge Sync. (Q
g
- Q
gd
)
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Min. Typ. Max. Units
230
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
85
20
26
59
15
76
40
77
4520
500
250
720
880
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
pF
ns
–––
120
–––
S
nC
I
D
= 75A
V
DS
=30V
V
GS
= 10V
g
Conditions
V
DS
= 50V, I
D
= 75A
I
D
= 75A, V
DS
=0V, V
GS
= 10V
V
DD
= 30V
I
D
= 75A
R
G
= 2.7Ω
V
GS
= 10V
g
V
GS
= 0V
V
DS
= 50V
ƒ = 1.0MHz, See Fig. 5
V
GS
= 0V, V
DS
= 0V to 48V
i,
See Fig. 11
V
GS
= 0V, V
DS
= 0V to 48V
h
C
oss
eff. (ER) Effective Output Capacitance (Energy Related) –––
C
oss
eff. (TR) Effective Output Capacitance (Time Related)h –––
Diode Characteristics
Symbol
I
S
I
SM
V
SD
t
rr
Q
rr
I
RRM
t
on
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
d
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
Forward Turn-On Time
Min. Typ. Max. Units
–––
–––
–––
–––
–––
–––
–––
–––
––– 160c
–––
–––
31
35
34
45
1.9
–––
A
nC
620
1.3
A
A
V
ns
Conditions
MOSFET symbol
showing the
integral reverse
p-n junction diode.
T
J
= 25°C, I
S
= 75A, V
GS
= 0V
g
T
J
= 25°C
T
J
= 125°C
T
J
= 25°C
T
J
= 125°C
T
J
= 25°C
V
R
= 51V,
I
F
= 75A
di/dt = 100A/μs
g
G
S
D
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Calculated continuous current based on maximum allowable junction
temperature. Bond wire current limit is 120A. Note that current
limitations arising from heating of the device leads may occur with
some lead mounting arrangements.
Repetitive rating; pulse width limited by max. junction
temperature.
Limited by T
Jmax
, starting T
J
= 25°C, L = 0.04mH
R
G
= 25Ω, I
AS
= 96A, V
GS
=10V. Part not recommended for use
above this value .
I
SD
≤
75A, di/dt
≤
1400A/μs, V
DD
≤
V
(BR)DSS
, T
J
≤
175°C.
Pulse width
≤
400μs; duty cycle
≤
2%.
C
oss
eff. (TR) is a fixed capacitance that gives the same charging time
as C
oss
while V
DS
is rising from 0 to 80% V
DSS
.
C
oss
eff. (ER) is a fixed capacitance that gives the same energy as
C
oss
while V
DS
is rising from 0 to 80% V
DSS
.
When mounted on 1" square PCB (FR-4 or G-10 Material). For recom
mended footprint and soldering techniques refer to application note #AN-994.
R
θ
is measured at T
J
approximately 90°C
2
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IRFP3306PbF
1000
TOP
1000
VGS
15V
10V
8.0V
6.0V
5.5V
5.0V
4.8V
4.5V
TOP
VGS
15V
10V
8.0V
6.0V
5.5V
5.0V
4.8V
4.5V
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
BOTTOM
BOTTOM
100
100
4.5V
4.5V
≤
60μs PULSE WIDTH
Tj = 25°C
10
0.1
1
10
100
≤
60μs PULSE WIDTH
Tj = 175°C
10
0.1
1
10
100
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 1.
Typical Output Characteristics
1000
2.5
Fig 2.
Typical Output Characteristics
RDS(on) , Drain-to-Source On Resistance
ID = 75A
2.0
ID, Drain-to-Source Current
(Α)
VGS = 10V
100
TJ = 175°C
10
(Normalized)
1.5
TJ = 25°C
1
1.0
VDS = 25V
0.1
2.0
3.0
4.0
5.0
≤
60μs PULSE WIDTH
6.0
7.0
8.0
0.5
-60 -40 -20
0
20 40 60 80 100 120 140 160 180
VGS, Gate-to-Source Voltage (V)
TJ , Junction Temperature (°C)
Fig 3.
Typical Transfer Characteristics
8000
VGS = 0V,
f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
Coss = Cds + Cgd
Fig 4.
Normalized On-Resistance vs. Temperature
20
VGS, Gate-to-Source Voltage (V)
ID= 75A
VDS = 48V
VDS= 30V
VDS= 12V
16
6000
C, Capacitance (pF)
Ciss
4000
12
8
2000
4
Coss
Crss
0
1
10
100
0
0
20
40
60
80
100
120
140
QG Total Gate Charge (nC)
VDS , Drain-to-Source Voltage (V)
Fig 5.
Typical Capacitance vs. Drain-to-Source Voltage
Fig 6.
Typical Gate Charge vs. Gate-to-Source Voltage
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3
IRFP3306PbF
1000
10000
ID, Drain-to-Source Current (A)
OPERATION IN THIS AREA
LIMITED BY R DS (on)
ISD , Reverse Drain Current (A)
100
1000
1msec
100μsec
TJ = 175°C
100
10
TJ = 25°C
10
10msec
1
1
VGS = 0V
0.1
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
Tc = 25°C
Tj = 175°C
Single Pulse
0.1
1
DC
0.1
10
100
VSD , Source-to-Drain Voltage (V)
VDS , Drain-toSource Voltage (V)
Fig 7.
Typical Source-Drain Diode
Forward Voltage
V(BR)DSS , Drain-to-Source Breakdown Voltage
Fig 8.
Maximum Safe Operating Area
80
180
160
140
ID, Drain Current (A)
Limited By Package
ID = 5mA
120
100
80
60
40
20
0
25
50
75
100
125
150
175
T C , Case Temperature (°C)
70
60
50
-60 -40 -20
0
20 40 60 80 100 120 140 160 180
TJ , Junction Temperature (°C)
Fig 9.
Maximum Drain Current vs.
Case Temperature
1.5
Fig 10.
Drain-to-Source Breakdown Voltage
800
EAS, Single Pulse Avalanche Energy (mJ)
600
13A
18A
BOTTOM
96A
TOP
ID
1.0
Energy (μJ)
400
0.5
200
0.0
0
10
20
30
40
50
60
0
25
50
75
100
125
150
175
VDS, Drain-to-Source Voltage (V)
Starting TJ, Junction Temperature (°C)
Fig 11.
Typical C
OSS
Stored Energy
Fig 12.
Maximum Avalanche Energy Vs. DrainCurrent
4
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IRFP3306PbF
1
D = 0.50
Thermal Response ( Z thJC )
0.1
0.20
0.10
0.05
0.02
0.01
0.01
τ
J
R
1
R
1
τ
J
τ
1
τ
2
R
2
R
2
τ
C
Ri (°C/W)
0.249761
τι
(sec)
0.00028
τ
1
τ
2
0.001
SINGLE PULSE
( THERMAL RESPONSE )
Ci=
τi/Ri
0.400239 0.005548
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.0001
0.001
0.01
0.1
0.0001
1E-006
1E-005
t1 , Rectangular Pulse Duration (sec)
Fig 13.
Maximum Effective Transient Thermal Impedance, Junction-to-Case
100
Duty Cycle = Single Pulse
0.01
Avalanche Current (A)
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming
ΔTj
= 150°C and
Tstart =25°C (Single Pulse)
0.05
10
0.10
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming
ΔΤ
j = 25°C and
Tstart = 150°C.
1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 14.
Typical Avalanche Current vs.Pulsewidth
200
EAR , Avalanche Energy (mJ)
160
TOP
Single Pulse
BOTTOM 1% Duty Cycle
ID = 96A
120
80
40
Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of T
jmax
. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long asT
jmax
is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.
4. P
D (ave)
= Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
6. I
av
= Allowable avalanche current.
7.
ΔT
=
Allowable rise in junction temperature, not to exceed T
jmax
(assumed as
25°C in Figure 14, 15).
t
av =
Average time in avalanche.
D = Duty cycle in avalanche = t
av
·f
Z
thJC
(D, t
av
) = Transient thermal resistance, see Figures 13)
175
0
25
50
75
100
125
150
Starting TJ , Junction Temperature (°C)
P
D (ave)
= 1/2 ( 1.3·BV·I
av
) =
DT/
Z
thJC
I
av
= 2DT/ [1.3·BV·Z
th
]
E
AS (AR)
= P
D (ave)
·t
av
Fig 15.
Maximum Avalanche Energy vs. Temperature
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